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https://github.com/YosysHQ/yosys
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fix
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parent
8382980927
commit
2c5d79d441
1 changed files with 8 additions and 8 deletions
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@ -3688,19 +3688,19 @@ struct VerificPass : public Pass {
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veri_file::AddLOption(args[++argidx].c_str());
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continue;
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}
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if (GetSize(args) > argidx && args[argidx] == "-set_vhdl_default_library_path") {
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for (argidx++; argidx < GetSize(args); argidx++) {
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#ifdef VERIFIC_VHDL_SUPPORT
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vhdl_file::SetDefaultLibraryPath(args[argidx].c_str());
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#endif
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}
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goto check_error;
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}
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#endif
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break;
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}
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#ifdef VERIFIC_SYSTEMVERILOG_SUPPORT
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if (GetSize(args) > argidx && args[argidx] == "-set_vhdl_default_library_path") {
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for (argidx++; argidx < GetSize(args); argidx++) {
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#ifdef VERIFIC_VHDL_SUPPORT
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vhdl_file::SetDefaultLibraryPath(args[argidx].c_str());
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#endif
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}
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goto check_error;
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}
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if (GetSize(args) > argidx && (args[argidx] == "-f" || args[argidx] == "-F"))
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{
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unsigned verilog_mode = veri_file::UNDEFINED;
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