From 2c5811daa1ff7f4acae8997d2637810e11eaffea Mon Sep 17 00:00:00 2001 From: Akash Levy Date: Mon, 9 Dec 2024 11:45:09 -0800 Subject: [PATCH] Fix warnings --- kernel/yosys.cc | 2 +- passes/opt/opt_dff.cc | 14 ++++++++++---- passes/sat/sim.cc | 6 +++--- 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/kernel/yosys.cc b/kernel/yosys.cc index 38a36161c..08e7842d4 100644 --- a/kernel/yosys.cc +++ b/kernel/yosys.cc @@ -547,7 +547,7 @@ void yosys_setup() if(already_setup) return; already_setup = true; - backward::SignalHandling* sh = new backward::SignalHandling; + new backward::SignalHandling; #ifdef WITH_PYTHON // With Python 3.12, calling PyImport_AppendInittab on an already // initialized platform fails (such as when libyosys is imported diff --git a/passes/opt/opt_dff.cc b/passes/opt/opt_dff.cc index 2f7d0c0c3..905aa0c15 100644 --- a/passes/opt/opt_dff.cc +++ b/passes/opt/opt_dff.cc @@ -409,10 +409,16 @@ struct OptDffWorker } else { if (ff.pol_set) tmp = module->Or(NEW_ID2_SUFFIX("aactive_aload"), ff.sig_ad, ff.sig_set, false, cell->get_src_attribute()); // SILIMATE: Improve the naming - else - tmp = module->Or(NEW_ID2_SUFFIX("aactive_aload"), ff.sig_ad, module->Not(NEW_ID2_SUFFIX("aactive_aload_inv"), ff.sig_set, false, cell->get_src_attribute())); // SILIMATE: Improve the naming - if (ff.pol_clr) - module->addAnd(NEW_ID2_SUFFIX("aactive_aload"), tmp, module->Not(NEW_ID2_SUFFIX("aactive_aload_inv"), ff.sig_clr, false, cell->get_src_attribute()), ff.sig_q); // SILIMATE: Improve the naming + else { + IdString aactive_aload_idstr = NEW_ID2_SUFFIX("aactive_aload"); + IdString aactive_aload_inv_idstr = NEW_ID2_SUFFIX("aactive_aload_inv"); + tmp = module->Or(aactive_aload_idstr, ff.sig_ad, module->Not(aactive_aload_inv_idstr, ff.sig_set, false, cell->get_src_attribute())); // SILIMATE: Improve the naming + } + if (ff.pol_clr) { + IdString aactive_aload_idstr = NEW_ID2_SUFFIX("aactive_aload"); + IdString aactive_aload_inv_idstr = NEW_ID2_SUFFIX("aactive_aload_inv"); + module->addAnd(aactive_aload_idstr, tmp, module->Not(aactive_aload_inv_idstr, ff.sig_clr, false, cell->get_src_attribute()), ff.sig_q); // SILIMATE: Improve the naming + } else module->addAnd(NEW_ID2_SUFFIX("aactive_aload"), tmp, ff.sig_clr, ff.sig_q, false, cell->get_src_attribute()); // SILIMATE: Improve the naming } diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc index 0fb4018d5..ebf002c46 100644 --- a/passes/sat/sim.cc +++ b/passes/sat/sim.cc @@ -2556,15 +2556,15 @@ struct AnnotateActivity : public OutputWriter { double totalActivity = 0.0f; double totalDuty = 0.0f; worker->top->write_output_header( - [this, debug](IdString name) { + [debug](IdString name) { if (debug) std::cout << stringf("module %s\n", log_id(name)); }, - [this, debug]() { + [debug]() { if (debug) std::cout << "endmodule\n"; }, - [this, &use_signal, &dataMap, max_time, real_timescale, clk_period, debug, &totalActivity, &totalDuty] + [&use_signal, &dataMap, max_time, real_timescale, clk_period, debug, &totalActivity, &totalDuty] (const char *name, int size, Wire *w, int id, bool) { if (!use_signal.at(id) || (w == nullptr)) return;