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opt_share: Refactor, fix some bugs.
Fixes #2334. Fixes #2335. Fixes #2336.
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4 changed files with 193 additions and 224 deletions
14
tests/opt/opt_share_bug2336.ys
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14
tests/opt/opt_share_bug2336.ys
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read_verilog <<EOT
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module top(input [3:0] A, B, C, input S, output [2:0] O);
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wire [3:0] tb = A + B;
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wire [3:0] tc = A + C;
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assign O = S ? tb[3:1] : tc[3:1];
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endmodule
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EOT
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equiv_opt -assert opt_share
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