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opt_share: Refactor, fix some bugs.

Fixes #2334.
Fixes #2335.
Fixes #2336.
This commit is contained in:
Marcelina Kościelnicka 2020-08-17 17:13:17 +02:00
parent 9a4f420b4b
commit 2b777bbda8
4 changed files with 193 additions and 224 deletions

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@ -0,0 +1,13 @@
read_verilog <<EOT
module t(input [3:0] A, input [3:0] B, input [3:0] C, input S, output [3:0] Y);
wire [3:0] t = A + C;
assign Y = S ? A + B : {4{t[0]}};
endmodule
EOT
equiv_opt -assert opt_share