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opt_share: Refactor, fix some bugs.
Fixes #2334. Fixes #2335. Fixes #2336.
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4 changed files with 193 additions and 224 deletions
13
tests/opt/opt_share_bug2334.ys
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tests/opt/opt_share_bug2334.ys
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read_verilog <<EOT
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module t(input [3:0] A, input [3:0] B, input [3:0] C, input S, output [3:0] Y);
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wire [3:0] t = A + C;
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assign Y = S ? A + B : {4{t[0]}};
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endmodule
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EOT
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equiv_opt -assert opt_share
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