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docs: Tidying image generation

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Makefiles now have `clean` target.
Also fixed top level makefile calls to images directory.
More yosys scripts instead of inline yosys commands in makefiles (which also means they can be included in the accompanying document when talking about the image generated).
Fixed another couple image generators that were still outputting pdf directly.
Fixed some hanging image references which hadn't been updated.
Adjusted some text related to images, and included a couple more intermediate images on `memdemo`.
This commit is contained in:
Krystine Sherwin 2023-11-15 17:39:37 +13:00
parent b6e61c16b1
commit 2b270b2270
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20 changed files with 197 additions and 118 deletions
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20
docs/source/code_examples/selections/Makefile
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@ -16,17 +16,15 @@ dots: select.dot $(SUMPROD_DOTS) $(MEMDEMO_DOTS) $(SUBMOD_DOTS)
select.dot: select.v select.ys
$(YOSYS) select.ys
$(SUMPROD_DOTS): sumprod.v
$(YOSYS) -p 'read_verilog sumprod.v; opt; cd sumprod; select a:sumstuff; show -format dot -prefix sumprod_00'
$(YOSYS) -p 'read_verilog sumprod.v; opt; cd sumprod; select a:sumstuff %x; show -format dot -prefix sumprod_01'
$(YOSYS) -p 'read_verilog sumprod.v; opt; cd sumprod; select prod; show -format dot -prefix sumprod_02'
$(YOSYS) -p 'read_verilog sumprod.v; opt; cd sumprod; select prod %ci; show -format dot -prefix sumprod_03'
$(YOSYS) -p 'read_verilog sumprod.v; opt; cd sumprod; select prod %ci2; show -format dot -prefix sumprod_04'
$(YOSYS) -p 'read_verilog sumprod.v; opt; cd sumprod; select prod %ci3; show -format dot -prefix sumprod_05'
$(SUMPROD_DOTS): sumprod.v sumprod.ys
$(YOSYS) sumprod.ys
$(MEMDEMO_DOTS): memdemo.v
$(YOSYS) -p 'read_verilog memdemo.v; proc; opt; memory; opt; cd memdemo; show -format dot -prefix memdemo_00'
$(YOSYS) -p 'read_verilog memdemo.v; proc; opt; memory; opt; cd memdemo; show -format dot -prefix memdemo_01 y %ci2:+$dff[Q,D] %ci*:-$mux[S]:-$dff'
$(MEMDEMO_DOTS): memdemo.v memdemo.ys
$(YOSYS) memdemo.ys
$(SUBMOD_DOTS): submod.ys memdemo.v
$(SUBMOD_DOTS): memdemo.v submod.ys
$(YOSYS) submod.ys
.PHONY: clean
clean:
rm -rf *.dot

9
docs/source/code_examples/selections/memdemo.ys Normal file
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@ -0,0 +1,9 @@
read_verilog memdemo.v
prep -top memdemo; memory; opt
cd memdemo
show -format dot -prefix memdemo_00
show -format dot -prefix memdemo_01 y %ci2
show -format dot -prefix memdemo_02 y %ci2:+$dff[Q,D]
show -format dot -prefix memdemo_03 y %ci2:-[CLK] %ci2
show -format dot -prefix memdemo_04 y %ci2:+$dff[Q,D] %ci*:-$mux[S]:-$dff

4
docs/source/code_examples/selections/select.ys
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@ -1,6 +1,6 @@
read_verilog select.v
hierarchy -check -top test
proc; opt
prep -top test
cd test
select -set cone_a state_a %ci*:-$dff
select -set cone_b state_b %ci*:-$dff

2
docs/source/code_examples/selections/submod.ys
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@ -1,5 +1,5 @@
read_verilog memdemo.v
proc; opt; memory; opt
prep -top memdemo; memory; opt
cd memdemo
select -set outstage y %ci2:+$dff[Q,D] %ci*:-$mux[S]:-$dff

10
docs/source/code_examples/selections/sumprod.ys Normal file
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@ -0,0 +1,10 @@
read_verilog sumprod.v
prep -top sumprod
cd sumprod
show -format dot -prefix sumprod_00 a:sumstuff
show -format dot -prefix sumprod_01 a:sumstuff %x
show -format dot -prefix sumprod_02 prod
show -format dot -prefix sumprod_03 prod %ci
show -format dot -prefix sumprod_04 prod %ci2
show -format dot -prefix sumprod_05 prod %ci3