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verific - make filepath handling compatible with verilog frontend

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This commit is contained in:
Miodrag Milanovic 2022-08-08 11:57:28 +02:00
parent 60a787fa50
commit 2b1aeb44d9
1 changed files with 29 additions and 15 deletions
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44
frontends/verific/verific.cc
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@ -2828,9 +2828,11 @@ struct VerificPass : public Pass {
for (auto &ext : verific_libexts) for (auto &ext : verific_libexts)
veri_file::AddLibExt(ext.c_str()); veri_file::AddLibExt(ext.c_str());
while (argidx < GetSize(args)) while (argidx < GetSize(args)) {
file_names.Insert(args[argidx++].c_str()); std::string filename(args[argidx++]);
rewrite_filename(filename);
file_names.Insert(strdup(filename.c_str()));
}
if (!veri_file::AnalyzeMultipleFiles(&file_names, verilog_mode, work.c_str(), veri_file::MFCU)) { if (!veri_file::AnalyzeMultipleFiles(&file_names, verilog_mode, work.c_str(), veri_file::MFCU)) {
verific_error_msg.clear(); verific_error_msg.clear();
log_cmd_error("Reading Verilog/SystemVerilog sources failed.\n"); log_cmd_error("Reading Verilog/SystemVerilog sources failed.\n");
@ -2843,36 +2845,48 @@ struct VerificPass : public Pass {
#ifdef VERIFIC_VHDL_SUPPORT #ifdef VERIFIC_VHDL_SUPPORT
if (GetSize(args) > argidx && args[argidx] == "-vhdl87") { if (GetSize(args) > argidx && args[argidx] == "-vhdl87") {
vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_1987").c_str()); vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_1987").c_str());
for (argidx++; argidx < GetSize(args); argidx++) for (argidx++; argidx < GetSize(args); argidx++) {
if (!vhdl_file::Analyze(args[argidx].c_str(), work.c_str(), vhdl_file::VHDL_87)) std::string filename(args[argidx]);
log_cmd_error("Reading `%s' in VHDL_87 mode failed.\n", args[argidx].c_str()); rewrite_filename(filename);
if (!vhdl_file::Analyze(filename.c_str(), work.c_str(), vhdl_file::VHDL_87))
log_cmd_error("Reading `%s' in VHDL_87 mode failed.\n", filename.c_str());
}
verific_import_pending = true; verific_import_pending = true;
goto check_error; goto check_error;
} }
if (GetSize(args) > argidx && args[argidx] == "-vhdl93") { if (GetSize(args) > argidx && args[argidx] == "-vhdl93") {
vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_1993").c_str()); vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_1993").c_str());
for (argidx++; argidx < GetSize(args); argidx++) for (argidx++; argidx < GetSize(args); argidx++) {
if (!vhdl_file::Analyze(args[argidx].c_str(), work.c_str(), vhdl_file::VHDL_93)) std::string filename(args[argidx]);
log_cmd_error("Reading `%s' in VHDL_93 mode failed.\n", args[argidx].c_str()); rewrite_filename(filename);
if (!vhdl_file::Analyze(filename.c_str(), work.c_str(), vhdl_file::VHDL_93))
log_cmd_error("Reading `%s' in VHDL_93 mode failed.\n", filename.c_str());
}
verific_import_pending = true; verific_import_pending = true;
goto check_error; goto check_error;
} }
if (GetSize(args) > argidx && args[argidx] == "-vhdl2k") { if (GetSize(args) > argidx && args[argidx] == "-vhdl2k") {
vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_1993").c_str()); vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_1993").c_str());
for (argidx++; argidx < GetSize(args); argidx++) for (argidx++; argidx < GetSize(args); argidx++) {
if (!vhdl_file::Analyze(args[argidx].c_str(), work.c_str(), vhdl_file::VHDL_2K)) std::string filename(args[argidx]);
log_cmd_error("Reading `%s' in VHDL_2K mode failed.\n", args[argidx].c_str()); rewrite_filename(filename);
if (!vhdl_file::Analyze(filename.c_str(), work.c_str(), vhdl_file::VHDL_2K))
log_cmd_error("Reading `%s' in VHDL_2K mode failed.\n", filename.c_str());
}
verific_import_pending = true; verific_import_pending = true;
goto check_error; goto check_error;
} }
if (GetSize(args) > argidx && (args[argidx] == "-vhdl2008" || args[argidx] == "-vhdl")) { if (GetSize(args) > argidx && (args[argidx] == "-vhdl2008" || args[argidx] == "-vhdl")) {
vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_2008").c_str()); vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_2008").c_str());
for (argidx++; argidx < GetSize(args); argidx++) for (argidx++; argidx < GetSize(args); argidx++) {
if (!vhdl_file::Analyze(args[argidx].c_str(), work.c_str(), vhdl_file::VHDL_2008)) std::string filename(args[argidx]);
log_cmd_error("Reading `%s' in VHDL_2008 mode failed.\n", args[argidx].c_str()); rewrite_filename(filename);
if (!vhdl_file::Analyze(filename.c_str(), work.c_str(), vhdl_file::VHDL_2008))
log_cmd_error("Reading `%s' in VHDL_2008 mode failed.\n", filename.c_str());
}
verific_import_pending = true; verific_import_pending = true;
goto check_error; goto check_error;
} }