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fabulous: Add support for mapping carry chains
Signed-off-by: gatecat <gatecat@ds0.me>
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5 changed files with 102 additions and 2 deletions
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@ -24,6 +24,20 @@ module LUT4(output O, input I0, I1, I2, I3);
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assign O = I0 ? s1[1] : s1[0];
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endmodule
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module LUT4_HA(output O, Co, input I0, I1, I2, I3, Ci);
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parameter [15:0] INIT = 0;
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parameter I0MUX = 1'b1;
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wire [ 7: 0] s3 = I3 ? INIT[15: 8] : INIT[ 7: 0];
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wire [ 3: 0] s2 = I2 ? s3[ 7: 4] : s3[ 3: 0];
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wire [ 1: 0] s1 = I1 ? s2[ 3: 2] : s2[ 1: 0];
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wire I0_sel = I0MUX ? Ci : I0;
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assign O = I0_sel ? s1[1] : s1[0];
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assign Co = (Ci & I1) | (Ci & I2) | (I1 & I2);
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endmodule
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module LUTFF(input CLK, D, output reg O);
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initial O = 1'b0;
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always @ (posedge CLK) begin
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