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Merge pull request #1026 from YosysHQ/clifford/fix1023

Keep zero-width wires in opt_clean if and only if they are ports
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Clifford Wolf 2019-05-27 13:24:19 +02:00 committed by GitHub
commit 2a9c68e2d6
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2 changed files with 12 additions and 2 deletions

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@ -319,8 +319,9 @@ bool rmunused_module_signals(RTLIL::Module *module, bool purge_mode, bool verbos
wire->attributes.erase("\\init");
if (GetSize(wire) == 0) {
// delete zero-width wires
goto delete_this_wire;
// delete zero-width wires, unless they are module ports
if (wire->port_id == 0)
goto delete_this_wire;
} else
if (wire->port_id != 0 || wire->get_bool_attribute("\\keep") || !initval.is_fully_undef()) {
// do not delete anything with "keep" or module ports or initialized wires