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Merge 366f98ae25 into 8d1d5a25e5

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Gus Smith 2026-03-19 10:12:03 +01:00 • committed by GitHub
commit 2a7c2b4f2d
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6 changed files with 113 additions and 5 deletions
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7
tests/sim/undriven_replay.v Normal file
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module undriven_replay (
input wire in,
output wire out,
output wire undrv
);
assign out = in;
endmodule

15
tests/sim/undriven_replay.vcd Normal file
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$version Yosys $end
$scope module undriven_replay $end
$var wire 1 ! in $end
$var wire 1 " out $end
$var wire 1 # undrv $end
$upscope $end
$enddefinitions $end
#0
b0 !
b0 "
b1 #
#10
b1 !
b1 "
b0 #

5
tests/sim/undriven_replay.ys Normal file
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read_verilog undriven_replay.v
prep -top undriven_replay
logger -expect error "Found 1 undriven signal in the replay trace" 1
sim -r undriven_replay.vcd -scope undriven_replay -q

4
tests/sim/undriven_replay_nocheck.ys Normal file
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read_verilog undriven_replay.v
prep -top undriven_replay
sim -r undriven_replay.vcd -scope undriven_replay -q -no-undriven-check

5
tests/sim/undriven_replay_warn.ys Normal file
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read_verilog undriven_replay.v
prep -top undriven_replay
logger -expect warning "Input trace contains undriven signal" 1
sim -r undriven_replay.vcd -scope undriven_replay -q -undriven-warn