mirror of
https://github.com/YosysHQ/yosys
synced 2025-12-02 18:19:13 +00:00
opt_mem_merge: Combine memories for byte enable.
The RAMs inferred by GHDL are split into separate instances for byte enables. This pass recombines memories that have the same input address (and matching characteristics) allowing a single BRAM to be used with byte enables. Work in progress, needs more checks for memory compatibility Briefly tested to work for microwatt
This commit is contained in:
parent
61324cf55f
commit
2a3804139f
3 changed files with 160 additions and 0 deletions
|
|
@ -35,6 +35,8 @@ struct MemoryPass : public Pass {
|
|||
log("\n");
|
||||
log("This pass calls all the other memory_* passes in a useful order:\n");
|
||||
log("\n");
|
||||
log(" opt_mem_merge\n");
|
||||
log(" opt_clean\n");
|
||||
log(" opt_mem\n");
|
||||
log(" opt_mem_priority\n");
|
||||
log(" opt_mem_feedback\n");
|
||||
|
|
@ -94,6 +96,8 @@ struct MemoryPass : public Pass {
|
|||
}
|
||||
extra_args(args, argidx, design);
|
||||
|
||||
Pass::call(design, "opt_mem_merge");
|
||||
Pass::call(design, "opt_clean");
|
||||
Pass::call(design, "opt_mem");
|
||||
Pass::call(design, "opt_mem_priority");
|
||||
Pass::call(design, "opt_mem_feedback");
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue