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Fixed handling of driver-driver conflicts in wreduce

This commit is contained in:
Clifford Wolf 2015-10-24 13:44:35 +02:00
parent 4cec1c058d
commit 2a0f577f83
3 changed files with 42 additions and 9 deletions

View file

@ -226,7 +226,7 @@ struct ModIndex : public RTLIL::Monitor
auto_reload_module = true;
}
ModIndex(RTLIL::Module *_m) : module(_m)
ModIndex(RTLIL::Module *_m) : sigmap(_m), module(_m)
{
auto_reload_counter = 0;
auto_reload_module = true;
@ -274,6 +274,27 @@ struct ModIndex : public RTLIL::Monitor
return empty_result_set;
return info->ports;
}
void dump_db()
{
log("--- ModIndex Dump ---\n");
if (auto_reload_module) {
log("AUTO-RELOAD\n");
reload_module();
}
for (auto &it : database) {
log("BIT %s:\n", log_signal(it.first));
if (it.second.is_input)
log(" PRIMARY INPUT\n");
if (it.second.is_output)
log(" PRIMARY OUTPUT\n");
for (auto &port : it.second.ports)
log(" PORT: %s.%s[%d] (%s)\n", log_id(port.cell),
log_id(port.port), port.offset, log_id(port.cell->type));
}
}
};
struct ModWalker

View file

@ -1448,6 +1448,10 @@ void RTLIL::Module::connect(const RTLIL::SigSig &conn)
for (auto mon : design->monitors)
mon->notify_connect(this, conn);
#ifndef NDEBUG
log_assert(!conn.first.has_const());
#endif
if (yosys_xtrace) {
log("#X# Connect (SigSig) in %s: %s = %s (%d bits)\n", log_id(this), log_signal(conn.first), log_signal(conn.second), GetSize(conn.first));
log_backtrace("-X- ", yosys_xtrace-1);