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Updates for hiding verific

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This commit is contained in:
Akash Levy 2024-04-09 07:16:22 -07:00
parent 0fa8098ff4
commit 29e9d3ea92
6 changed files with 56 additions and 56 deletions
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4
tests/verific/rom_case.ys.fail
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@ -1,4 +1,4 @@
verific -sv <<EOF
import -sv <<EOF
module rom(input clk, input [2:0] addr, (* ram_style = "block" *) output reg [7:0] data);
always @(posedge clk) begin
@ -30,7 +30,7 @@ select -assert-count 1 t:RAM_BLOCK_SDP
design -reset
verific -vhdl <<EOF
import -vhdl <<EOF
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.std_logic_unsigned.all;