mirror of
https://github.com/YosysHQ/yosys
synced 2025-07-04 11:55:41 +00:00
Renamed "placeholder" to "blackbox"
This commit is contained in:
parent
c854ad2e7e
commit
295e352ba6
12 changed files with 27 additions and 27 deletions
|
@ -73,7 +73,7 @@ static void add_wire(RTLIL::Design *design, RTLIL::Module *module, std::string n
|
|||
RTLIL::Module *mod = design->modules.at(it.second->type);
|
||||
if (!design->selected_whole_module(mod->name))
|
||||
continue;
|
||||
if (mod->get_bool_attribute("\\placeholder"))
|
||||
if (mod->get_bool_attribute("\\blackbox"))
|
||||
continue;
|
||||
if (it.second->connections.count(name) > 0)
|
||||
continue;
|
||||
|
@ -144,7 +144,7 @@ struct AddPass : public Pass {
|
|||
RTLIL::Module *module = mod.second;
|
||||
if (!design->selected_whole_module(module->name))
|
||||
continue;
|
||||
if (module->get_bool_attribute("\\placeholder"))
|
||||
if (module->get_bool_attribute("\\blackbox"))
|
||||
continue;
|
||||
|
||||
if (command == "wire")
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue