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Renamed "placeholder" to "blackbox"
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parent
c854ad2e7e
commit
295e352ba6
12 changed files with 27 additions and 27 deletions
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@ -73,7 +73,7 @@ static void add_wire(RTLIL::Design *design, RTLIL::Module *module, std::string n
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RTLIL::Module *mod = design->modules.at(it.second->type);
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if (!design->selected_whole_module(mod->name))
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continue;
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if (mod->get_bool_attribute("\\placeholder"))
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if (mod->get_bool_attribute("\\blackbox"))
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continue;
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if (it.second->connections.count(name) > 0)
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continue;
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@ -144,7 +144,7 @@ struct AddPass : public Pass {
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RTLIL::Module *module = mod.second;
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if (!design->selected_whole_module(module->name))
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continue;
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if (module->get_bool_attribute("\\placeholder"))
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if (module->get_bool_attribute("\\blackbox"))
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continue;
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if (command == "wire")
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@ -477,8 +477,8 @@ struct ShowWorker
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if (!design->selected_module(module->name))
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continue;
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if (design->selected_whole_module(module->name)) {
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if (module->get_bool_attribute("\\placeholder")) {
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log("Skipping placeholder module %s.\n", id2cstr(module->name));
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if (module->get_bool_attribute("\\blackbox")) {
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log("Skipping blackbox module %s.\n", id2cstr(module->name));
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continue;
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} else
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if (module->cells.empty() && module->connections.empty() && module->processes.empty()) {
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@ -617,7 +617,7 @@ struct ShowPass : public Pass {
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if (format != "ps") {
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int modcount = 0;
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for (auto &mod_it : design->modules) {
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if (mod_it.second->get_bool_attribute("\\placeholder"))
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if (mod_it.second->get_bool_attribute("\\blackbox"))
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continue;
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if (mod_it.second->cells.empty() && mod_it.second->connections.empty())
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continue;
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