mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-20 10:10:23 +00:00
Code Activity

Wrap FDRE with $__ABC_FDRE containing comb

Browse source
This commit is contained in:
Eddie Hung 2019-06-15 09:08:56 -07:00
parent da487c4f31
commit 295bb23ae0
4 changed files with 29 additions and 12 deletions
Download patch file Download diff file Expand all files Collapse all files

1
techlibs/xilinx/Makefile.inc
View file

@ -30,6 +30,7 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/arith_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/ff_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_ff.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.box))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.lut))