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Moved common techlib files to techlibs/common

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Clifford Wolf 2013-09-15 11:52:57 +02:00
parent 647c23b7b7
commit 288ba9618a
13 changed files with 17 additions and 17 deletions
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manual/CHAPTER_Techmap.tex
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@ -27,7 +27,7 @@ cells with the provided implementation.
When no map file is provided, {\tt techmap} uses a built-in map file that
maps the Yosys RTL cell types to the internal gate library used by Yosys.
The curious reader may find this map file as {\tt techlibs/stdcells.v} in
The curious reader may find this map file as {\tt techlibs/common/stdcells.v} in
the Yosys source tree.
Additional features have been added to {\tt techmap} to allow for conditional