From 2811131d8ac27aa7e6f9ce5d4481568765782c97 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Tue, 24 Mar 2026 08:47:57 +0100 Subject: [PATCH] Convert arch --- tests/Makefile | 2 +- tests/arch/generate_mk.py | 52 +++++++++++++++++++++++++++++++++++++++ tests/arch/run-test.sh | 30 ---------------------- 3 files changed, 53 insertions(+), 31 deletions(-) create mode 100644 tests/arch/generate_mk.py delete mode 100755 tests/arch/run-test.sh diff --git a/tests/Makefile b/tests/Makefile index f971ec5e5..832bdc716 100644 --- a/tests/Makefile +++ b/tests/Makefile @@ -68,7 +68,7 @@ MK_TEST_DIRS += ./select MK_TEST_DIRS += ./peepopt MK_TEST_DIRS += ./proc MK_TEST_DIRS += ./blif -#SH_TEST_DIRS += ./arch +MK_TEST_DIRS += ./arch MK_TEST_DIRS += ./rpc MK_TEST_DIRS += ./memfile #SH_TEST_DIRS += ./fmt diff --git a/tests/arch/generate_mk.py b/tests/arch/generate_mk.py new file mode 100644 index 000000000..3ea1f1c44 --- /dev/null +++ b/tests/arch/generate_mk.py @@ -0,0 +1,52 @@ +#!/usr/bin/env python3 + +from pathlib import Path +import sys +sys.path.append("..") + +import gen_tests_makefile + +techlibs_dir = Path("../../techlibs") + +# Architecture-specific defines +defines = { + "ice40": ["ICE40_HX", "ICE40_LP", "ICE40_U"] +} + +def archs(): + # Loop over architectures + for arch in techlibs_dir.iterdir(): + if not arch.is_dir(): + continue + arch_name = arch.name + + for path in arch.rglob("cells_sim.v"): + rel_parts = path.relative_to(techlibs_dir).parts + target_base = "_".join(rel_parts[-len(rel_parts):]).replace(".v", "") + path_str = str(path) + if arch_name in defines: + for defn in defines[arch_name]: + target_name = f"{target_base}_{defn}" + cmd = f"iverilog -t null -I{arch} -D{defn} -DNO_ICE40_DEFAULT_ASSIGNMENTS {path_str} >/dev/null 2>&1" + gen_tests_makefile.generate_target(target_name, cmd) + else: + target_name = f"{target_base}" + cmd = f"iverilog -t null -I{arch} -g2005-sv {path_str} >/dev/null 2>&1" + gen_tests_makefile.generate_target(target_name, cmd) + +def common(): + for path in ["../../techlibs/common/simcells.v", "../../techlibs/common/simlib.v"]: + path_obj = Path(path) + target_name = path_obj.stem + cmd = f"iverilog -t null {path} >/dev/null 2>&1" + gen_tests_makefile.generate_target(target_name, cmd) + +def main(): + def callback(): + archs() + common() + + gen_tests_makefile.generate_custom(callback) + +if __name__ == "__main__": + main() diff --git a/tests/arch/run-test.sh b/tests/arch/run-test.sh deleted file mode 100755 index 087abf536..000000000 --- a/tests/arch/run-test.sh +++ /dev/null @@ -1,30 +0,0 @@ -#!/usr/bin/env bash -source ../common-env.sh - -set -e - -declare -A defines=( ["ice40"]="ICE40_HX ICE40_LP ICE40_U" ) - -echo "Running syntax check on arch sim models" -for arch in ../../techlibs/*; do - find $arch -name cells_sim.v | while read path; do - arch_name=$(basename -- $arch) - if [ "${defines[$arch_name]}" ]; then - for def in ${defines[$arch_name]}; do - echo -n "Test $path -D$def ->" - iverilog -t null -I$arch -D$def -DNO_ICE40_DEFAULT_ASSIGNMENTS $path >/dev/null 2>&1 - echo " ok" - done - else - echo -n "Test $path ->" - iverilog -t null -I$arch -g2005-sv $path >/dev/null 2>&1 - echo " ok" - fi - done -done - -for path in "../../techlibs/common/simcells.v" "../../techlibs/common/simlib.v"; do - echo -n "Test $path ->" - iverilog -t null $path >/dev/null 2>&1 - echo " ok" -done