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Added "top" attribute to mark top module in hierarchy

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This commit is contained in:
Clifford Wolf 2013-11-24 05:03:43 +01:00
parent a4edecb0ca
commit 28093d9dd2
6 changed files with 63 additions and 3 deletions
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5
backends/blif/blif.cc
View file

@ -293,6 +293,11 @@ struct BlifBackend : public Backend {
}
extra_args(f, filename, args, argidx);
if (top_module_name.empty())
for (auto & mod_it:design->modules)
if (mod_it.second->get_bool_attribute("\\top"))
top_module_name = mod_it.first;
fprintf(f, "# Generated by %s\n", yosys_version_str);
std::vector<RTLIL::Module*> mod_list;

5
backends/edif/edif.cc
View file

@ -118,6 +118,11 @@ struct EdifBackend : public Backend {
}
extra_args(f, filename, args, argidx);
if (top_module_name.empty())
for (auto & mod_it:design->modules)
if (mod_it.second->get_bool_attribute("\\top"))
top_module_name = mod_it.first;
for (auto module_it : design->modules)
{
RTLIL::Module *module = module_it.second;

5
backends/spice/spice.cc
View file

@ -172,6 +172,11 @@ struct SpiceBackend : public Backend {
}
extra_args(f, filename, args, argidx);
if (top_module_name.empty())
for (auto & mod_it:design->modules)
if (mod_it.second->get_bool_attribute("\\top"))
top_module_name = mod_it.first;
fprintf(f, "* SPICE netlist generated by %s\n", yosys_version_str);
fprintf(f, "\n");