mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-07-15 11:45:41 +00:00
Code Activity

wreduce shifter signedness fix

Browse source
This commit is contained in:
Akash Levy 2025-04-04 14:27:38 -07:00
parent 61715c2c28
commit 276800c39b
1 changed files with 1 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
passes/opt/wreduce.cc
View file

@ -238,7 +238,7 @@ struct WreduceWorker
SigSpec sig = mi.sigmap(cell->getPort(stringf("\\%c", port)));
if (port == 'B' && cell->type.in(ID($shl), ID($shr), ID($sshl), ID($sshr)))
port_signed = false;
port_signed = true; // SILIMATE: HAD TO CHANGE THIS TO RESOLVE CUSTOMER_SHL_BLOWUP_2. REAL FIX IS TO MAKE SURE THAT YOSYS DOES THE RIGHT THING WITH SIGNEDNESS.
int bits_removed = 0;
if (GetSize(sig) > max_port_size) {