mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-03 21:09:12 +00:00
Code Activity

Fixed bug in memory_share feedback-to-en code

Browse source
This commit is contained in:
Clifford Wolf 2014-07-19 15:32:14 +02:00
parent e441f07d89
commit 26f982ac0b
2 changed files with 36 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

24
tests/memories/no_implicit_en.v Normal file
View file

@ -0,0 +1,24 @@
// expect-wr-ports 1
// expect-rd-ports 2
module test(clk, rd_addr, rd_data, cp_addr, wr_addr, wr_en, wr_data);
input clk;
input [3:0] rd_addr;
output reg [31:0] rd_data;
input [3:0] cp_addr, wr_addr, wr_en;
input [31:0] wr_data;
reg [31:0] mem [0:15];
always @(posedge clk) begin
mem[wr_addr][ 7: 0] <= wr_en[0] ? wr_data[ 7: 0] : mem[cp_addr][ 7: 0];
mem[wr_addr][15: 8] <= wr_en[1] ? wr_data[15: 8] : mem[cp_addr][15: 8];
mem[wr_addr][23:16] <= wr_en[2] ? wr_data[23:16] : mem[cp_addr][23:16];
mem[wr_addr][31:24] <= wr_en[3] ? wr_data[31:24] : mem[cp_addr][31:24];
rd_data <= mem[rd_addr];
end
endmodule