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Refactoring memory attribute matching based on IEEE 1364.1 and Tool specific

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This commit is contained in:
Diego H 2019-12-13 15:43:24 -06:00
parent 52875b0d61
commit 266993408a
2 changed files with 96 additions and 0 deletions
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19
techlibs/xilinx/xc7_xcu_brams.txt
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@ -81,6 +81,7 @@ match $__XILINX_RAMB36_SDP
min efficiency 5
shuffle_enable B
make_transp
attribute !ram_style !logic_block
or_next_if_better
endmatch
@ -89,6 +90,14 @@ match $__XILINX_RAMB18_SDP
min efficiency 5
shuffle_enable B
make_transp
attribute !ram_style !logic_block
or_next_if_better
endmatch
match $__XILINX_RAMB18_SDP
shuffle_enable B
make_transp
attribute ram_block=1 ram_style=block
or_next_if_better
endmatch
@ -97,6 +106,7 @@ match $__XILINX_RAMB36_TDP
min efficiency 5
shuffle_enable B
make_transp
attribute !ram_style !logic_block
or_next_if_better
endmatch
@ -105,4 +115,13 @@ match $__XILINX_RAMB18_TDP
min efficiency 5
shuffle_enable B
make_transp
attribute !ram_style !logic_block
or_next_if_better
endmatch
match $__XILINX_RAMB18_TDP
min efficiency 5
shuffle_enable B
make_transp
attribute ram_block=1 ram_style=block
endmatch