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VHDL only build support
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parent
54bf9ccf06
commit
25d50bb2af
3 changed files with 144 additions and 29 deletions
11
Makefile
11
Makefile
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@ -20,6 +20,7 @@ ENABLE_VERIFIC := 0
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ENABLE_VERIFIC_EDIF := 0
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ENABLE_VERIFIC_LIBERTY := 0
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DISABLE_VERIFIC_EXTENSIONS := 0
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DISABLE_VERIFIC_SYSTEMVERILOG := 0
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DISABLE_VERIFIC_VHDL := 0
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DISABLE_VERIFIC_HIER_TREE := 0
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ENABLE_COVER := 1
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@ -472,7 +473,7 @@ endif
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LIBS_VERIFIC =
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ifeq ($(ENABLE_VERIFIC),1)
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VERIFIC_DIR ?= /usr/local/src/verific_lib
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VERIFIC_COMPONENTS ?= verilog database util containers
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VERIFIC_COMPONENTS ?= database util containers
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ifneq ($(DISABLE_VERIFIC_HIER_TREE),1)
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VERIFIC_COMPONENTS += hier_tree
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CXXFLAGS += -DVERIFIC_HIER_TREE_SUPPORT
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@ -481,6 +482,14 @@ ifneq ($(wildcard $(VERIFIC_DIR)/hier_tree),)
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VERIFIC_COMPONENTS += hier_tree
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endif
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endif
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ifneq ($(DISABLE_VERIFIC_SYSTEMVERILOG),1)
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VERIFIC_COMPONENTS += verilog
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CXXFLAGS += -DVERIFIC_SYSTEMVERILOG_SUPPORT
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else
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ifneq ($(wildcard $(VERIFIC_DIR)/verilog),)
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VERIFIC_COMPONENTS += verilog
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endif
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endif
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ifneq ($(DISABLE_VERIFIC_VHDL),1)
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VERIFIC_COMPONENTS += vhdl
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CXXFLAGS += -DVERIFIC_VHDL_SUPPORT
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