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https://github.com/YosysHQ/yosys
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rtlil: complicate extract again for packing
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14b0efeced
commit
25b9b796c4
5 changed files with 167 additions and 14 deletions
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@ -5,7 +5,7 @@
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YOSYS_NAMESPACE_BEGIN
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// Test fixture with helper functions
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class SigSpecRemove2Test : public ::testing::Test {
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class SigSpecRepTest : public ::testing::Test {
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protected:
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Design* d;
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Module* m;
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@ -64,7 +64,7 @@ protected:
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}
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};
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TEST_F(SigSpecRemove2Test, WithSigSpecPattern)
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TEST_F(SigSpecRepTest, WithSigSpecPattern)
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{
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auto wires = createWires(4);
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SigSpec sig = wiresAsSigSpec(wires);
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@ -84,7 +84,7 @@ TEST_F(SigSpecRemove2Test, WithSigSpecPattern)
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EXPECT_EQ(sig, expected);
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}
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TEST_F(SigSpecRemove2Test, WithPoolPattern)
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TEST_F(SigSpecRepTest, WithPoolPattern)
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{
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auto wires = createWires(3);
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SigSpec sig = wiresAsSigSpec(wires);
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@ -103,7 +103,7 @@ TEST_F(SigSpecRemove2Test, WithPoolPattern)
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EXPECT_EQ(sig, expected);
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}
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TEST_F(SigSpecRemove2Test, WithSetPattern)
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TEST_F(SigSpecRepTest, WithSetPattern)
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{
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auto wires = createWires(3);
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SigSpec sig = wiresAsSigSpec(wires);
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@ -122,7 +122,7 @@ TEST_F(SigSpecRemove2Test, WithSetPattern)
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EXPECT_EQ(sig, expected);
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}
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TEST_F(SigSpecRemove2Test, ManyElements)
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TEST_F(SigSpecRepTest, ManyElements)
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{
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const int num_wires = 100;
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auto wires = createWires(num_wires);
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@ -146,7 +146,7 @@ TEST_F(SigSpecRemove2Test, ManyElements)
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}
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// Test remove2 with very large dataset to check scaling
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TEST_F(SigSpecRemove2Test, VeryLargeScalingTest)
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TEST_F(SigSpecRepTest, VeryLargeScalingTest)
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{
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const int num_wires = 50000;
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auto wires = createWires(num_wires);
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@ -173,7 +173,7 @@ TEST_F(SigSpecRemove2Test, VeryLargeScalingTest)
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}
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// Test multiple sequential removals (simulates removeSignalFromCaseTree)
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TEST_F(SigSpecRemove2Test, MultipleSequentialRemovals)
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TEST_F(SigSpecRepTest, MultipleSequentialRemovals)
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{
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const int num_wires = 512;
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auto wires = createWires(num_wires);
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@ -204,7 +204,7 @@ TEST_F(SigSpecRemove2Test, MultipleSequentialRemovals)
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}
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// Test remove2 with very large dataset to check scaling
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TEST_F(SigSpecRemove2Test, PoolOverloadLargeDataset)
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TEST_F(SigSpecRepTest, PoolOverloadLargeDataset)
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{
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const int num_wires = 50000;
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auto wires = createWires(num_wires, 1);
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@ -228,7 +228,7 @@ TEST_F(SigSpecRemove2Test, PoolOverloadLargeDataset)
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}
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// Test set overload (same perf characteristics as pool)
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TEST_F(SigSpecRemove2Test, SetOverloadLargeDataset)
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TEST_F(SigSpecRepTest, SetOverloadLargeDataset)
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{
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const int num_wires = 50000;
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auto wires = createWires(num_wires, 1);
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@ -252,7 +252,7 @@ TEST_F(SigSpecRemove2Test, SetOverloadLargeDataset)
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}
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// Worst case: remove almost all elements
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TEST_F(SigSpecRemove2Test, RemoveAlmostAllElements)
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TEST_F(SigSpecRepTest, RemoveAlmostAllElements)
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{
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const int num_wires = 10000;
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auto wires = createWires(num_wires, 1);
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@ -269,7 +269,7 @@ TEST_F(SigSpecRemove2Test, RemoveAlmostAllElements)
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EXPECT_EQ(sig[0].wire, wires[num_wires - 1]);
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}
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TEST_F(SigSpecRemove2Test, EmptyPattern)
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TEST_F(SigSpecRepTest, EmptyPattern)
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{
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auto wires = createWires(1);
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SigSpec sig(wires[0]);
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@ -285,7 +285,7 @@ TEST_F(SigSpecRemove2Test, EmptyPattern)
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}
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// Test that NULL wire bits (constants) are not removed
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TEST_F(SigSpecRemove2Test, NullWireBitsStay)
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TEST_F(SigSpecRepTest, NullWireBitsStay)
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{
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auto wires = createWires(1);
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SigSpec sig;
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@ -309,7 +309,7 @@ TEST_F(SigSpecRemove2Test, NullWireBitsStay)
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EXPECT_EQ(sig, expected);
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}
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TEST_F(SigSpecRemove2Test, PartialBitRemoval)
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TEST_F(SigSpecRepTest, PartialBitRemoval)
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{
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Wire* w = m->addWire("$w1", 8);
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SigSpec sig(w);
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