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cost: Add $mem_v2
, $macc_v2
estimates
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@ -1,4 +1,5 @@
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#include "kernel/cost.h"
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#include "kernel/macc.h"
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USING_YOSYS_NAMESPACE
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@ -148,6 +149,9 @@ unsigned int CellCosts::get(RTLIL::Cell *cell)
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log_assert(cell->hasPort(ID::Q) && "Weird flip flop");
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log_debug("%s is ff\n", cell->name.c_str());
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return cell->getParam(ID::WIDTH).as_int();
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} else if (cell->type.in(ID($mem), ID($mem_v2))) {
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log_debug("%s is mem\n", cell->name.c_str());
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return cell->getParam(ID::WIDTH).as_int() * cell->getParam(ID::SIZE).as_int();
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} else if (y_coef(cell->type)) {
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// linear with Y_WIDTH or WIDTH
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log_assert((cell->hasParam(ID::Y_WIDTH) || cell->hasParam(ID::WIDTH)) && "Unknown width");
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@ -173,6 +177,22 @@ unsigned int CellCosts::get(RTLIL::Cell *cell)
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unsigned int coef = cell->type == ID($mul) ? 3 : 5;
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log_debug("%s coef*(sum**2) %d * %d\n", cell->name.c_str(), coef, sum * sum);
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return coef * sum * sum;
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} else if (cell->type.in(ID($macc), ID($macc_v2))) {
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// quadratic per term
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unsigned int cost_sum = 0;
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Macc macc;
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macc.from_cell(cell);
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unsigned int y_width = cell->getParam(ID::Y_WIDTH).as_int();
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for (auto &term: macc.terms) {
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if (term.in_b.empty()) {
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// neglect addends
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continue;
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}
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unsigned a_width = term.in_a.size(), b_width = term.in_b.size();
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unsigned int sum = a_width + b_width + std::min(y_width, a_width + b_width);
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cost_sum += 3 * sum * sum;
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}
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return cost_sum;
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} else if (cell->type == ID($lut)) {
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int width = cell->getParam(ID::WIDTH).as_int();
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unsigned int cost = 1U << (unsigned int)width;
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@ -187,8 +207,8 @@ unsigned int CellCosts::get(RTLIL::Cell *cell)
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log_debug("%s is free\n", cell->name.c_str());
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return 0;
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}
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// TODO: $fsm $mem.* $macc
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// ignored: $pow
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// TODO: $fsm
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// ignored: $pow $memrd $memwr $meminit (and v2 counterparts)
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log_warning("Can't determine cost of %s cell (%d parameters).\n", log_id(cell->type), GetSize(cell->parameters));
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return 1;
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