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Add support for MULT and DPORT

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This commit is contained in:
Eddie Hung 2019-09-13 11:45:55 -07:00
parent e235dd0785
commit 247a63f55d
4 changed files with 588 additions and 10 deletions
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9
techlibs/xilinx/abc_unmap.v
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@ -30,14 +30,13 @@ endmodule
module \$__ABC_DSP48E1_REG (input [47:0] I, output [47:0] O, output Q);
assign O = I;
endmodule
module \$__ABC_DSP48E1_MULT_P_MUX (input Aq, Bq, Cq, Dq, ADq, Mq, input [47:0] P, input Pq, output [47:0] O);
assign O = P;
endmodule
module \$__ABC_DSP48E1_MULT_PCOUT_MUX (input Aq, Bq, Cq, Dq, ADq, Mq, input [47:0] P, input Pq, output [47:0] O);
(* techmap_celltype = "$__ABC_DSP48E1_MULT_P_MUX $__ABC_DSP48E1_MULT_PCOUT_MUX $__ABC_DSP48E1_MULT_DPORT_P_MUX $__ABC_DSP48E1_MULT_DPORT_PCOUT_MUX" *)
module \$__ABC_DSP48E1_MUX (input Aq, Bq, Cq, Dq, ADq, Mq, input [47:0] P, input Pq, output [47:0] O);
assign O = P;
endmodule
module \$__ABC_DSP48E1_MULT (
(* techmap_celltype = "$__ABC_DSP48E1_MULT $__ABC_DSP48E1_MULT_DPORT" *)
module \$__ABC_DSP48E1 (
output [29:0] ACOUT,
output [17:0] BCOUT,
output reg CARRYCASCOUT,