mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-07-17 12:45:44 +00:00
Code Activity

Merge pull request #164 from Silimate/feat/chunk-parallel-sim

Browse source 
Fix: don't log error when getting non-top cells in -bb mode
This commit is contained in:
Akash Levy 2026-05-12 12:51:40 -07:00 • committed by GitHub
commit 242d87079a
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
1 changed files with 3 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

5
passes/sat/sim.cc
View file

@ -649,10 +649,11 @@ struct SimInstance
if (cell->type == ID($print))
return;
// If the cell is a blackbox child of an instance root module, skip it
// In -bb mode every hierarchical cell is a cut boundary. Its outputs were already sourced from the FST.
// Don't log error for these cells.
if (shared->blackbox_children) {
Module *mod = module->design->module(cell->type);
if (mod && shared->instance_root_modules.count(mod->name))
if (mod)
return;
}