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synth_gatemate: Initial implementation

Signed-off-by: Patrick Urban <patrick.urban@web.de>
This commit is contained in:
Patrick Urban 2021-09-13 17:16:15 +02:00 committed by Marcelina Kościelnicka
parent b3e2001e1f
commit 240d289fff
29 changed files with 4053 additions and 0 deletions

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read_verilog ../common/adffs.v
design -save read
hierarchy -top adff
proc
equiv_opt -async2sync -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd adff # Constrain all select calls below inside the top module
select -assert-count 1 t:CC_BUFG
select -assert-count 1 t:CC_DFF
select -assert-none t:CC_BUFG t:CC_DFF %% t:* %D
design -load read
hierarchy -top adffn
proc
equiv_opt -async2sync -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd adffn # Constrain all select calls below inside the top module
select -assert-count 1 t:CC_BUFG
select -assert-count 1 t:CC_DFF
select -assert-none t:CC_BUFG t:CC_DFF %% t:* %D
design -load read
hierarchy -top dffs
proc
equiv_opt -async2sync -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd dffs # Constrain all select calls below inside the top module
select -assert-count 1 t:CC_BUFG
select -assert-count 1 t:CC_DFF
select -assert-count 1 t:CC_LUT2
select -assert-none t:CC_BUFG t:CC_DFF t:CC_LUT2 %% t:* %D
design -load read
hierarchy -top ndffnr
proc
equiv_opt -async2sync -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd ndffnr # Constrain all select calls below inside the top module
select -assert-count 1 t:CC_BUFG
select -assert-count 1 t:CC_DFF
select -assert-count 1 t:CC_LUT2
select -assert-none t:CC_BUFG t:CC_DFF t:CC_LUT2 %% t:* %D