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Fixed handling of transparent bram rd ports on ROMs
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2 changed files with 4 additions and 0 deletions
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@ -656,6 +656,9 @@ grow_read_ports:;
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bool transp = rd_transp[cell_port_i] == State::S1;
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SigBit clksig = rd_clk[cell_port_i];
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if (wr_ports == 0)
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transp = false;
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pair<SigBit, bool> clkdom(clksig, clkpol);
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if (!clken)
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clkdom = pair<SigBit, bool>(State::S1, false);
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