mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-13 04:28:18 +00:00
Add non-input bits driven by unrecognised cells as ci_bits
This commit is contained in:
parent
1a49cf29d8
commit
2217d59e29
|
@ -229,7 +229,7 @@ struct XAigerWriter
|
||||||
}
|
}
|
||||||
if (is_output) {
|
if (is_output) {
|
||||||
SigBit O = sigmap(b);
|
SigBit O = sigmap(b);
|
||||||
if (!input_bits.count(O) && !output_bits.count(O))
|
if (!input_bits.count(O))
|
||||||
ci_bits.insert(O);
|
ci_bits.insert(O);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in a new issue