3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-07-17 12:45:44 +00:00

Changed configurations to match the OpenROAD project

This commit is contained in:
AdvaySingh1 2026-02-17 11:57:56 -08:00
parent 144db54c4e
commit 2212d85626

View file

@ -95,7 +95,7 @@ void profileFlipFlops(Module *module, const std::string &filename, const std::st
// Configuration
static const int DEFAULT_MAX_COVER = 100; // Max candidate signals to consider
static const int DEFAULT_MIN_REGS = 3; // Min registers per clock gate
static const int DEFAULT_MIN_REGS = 10; // Min registers per clock gate
static const int DEFAULT_SIM_ITERATIONS = 10; // Random simulation iterations for pruning
struct SatClockgateWorker