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verilog: error on macro invocations with missing argument lists

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This would previously complain about an undefined internal macro if the
unapplied macro had not already been used. If it had, it would
incorrectly use the arguments from the previous invocation.
This commit is contained in:
Zachary Snow 2021-02-18 12:04:02 -05:00
parent 127484e675
commit 220cb1f7bb
3 changed files with 32 additions and 1 deletions
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11
frontends/verilog/preproc.cc
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@ -477,7 +477,16 @@ static bool try_expand_macro(define_map_t &defines, std::string &tok)
std::string name = tok.substr(1);
std::string skipped_spaces = skip_spaces();
tok = next_token(false);
if (tok == "(" && body->has_args) {
if (body->has_args) {
if (tok != "(") {
if (tok.size() == 1 && iscntrl(tok[0])) {
char buf[5];
snprintf(buf, sizeof(buf), "\\x%02x", tok[0]);
tok = buf;
}
log_error("Expected to find '(' to begin macro arguments for '%s', but instead found '%s'\n",
name.c_str(), tok.c_str());
}
std::vector<std::string> args;
bool done = false;
while (!done) {