From c9c13c29dfcbb9c54f1d2388e623829b6f5a0c25 Mon Sep 17 00:00:00 2001 From: Anonymous Maarten Date: Wed, 17 Jun 2020 15:08:55 +0200 Subject: [PATCH 1/4] MSVC defines TRANSPARENT too --- kernel/yosys.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/kernel/yosys.h b/kernel/yosys.h index c922faf26..4fca39228 100644 --- a/kernel/yosys.h +++ b/kernel/yosys.h @@ -117,11 +117,11 @@ extern Tcl_Obj *Tcl_ObjSetVar2(Tcl_Interp *interp, Tcl_Obj *part1Ptr, Tcl_Obj *p # define PATH_MAX MAX_PATH # define isatty _isatty # define fileno _fileno -# else -// mingw includes `wingdi.h` which defines a TRANSPARENT macro -// that conflicts with X(TRANSPARENT) entry in kernel/constids.inc -# undef TRANSPARENT # endif + +// mingw and msvc include `wingdi.h` which defines a TRANSPARENT macro +// that conflicts with X(TRANSPARENT) entry in kernel/constids.inc +# undef TRANSPARENT #endif #ifndef PATH_MAX From 35008e6d40af212655b549f481f58f9c066be08a Mon Sep 17 00:00:00 2001 From: Anonymous Maarten Date: Wed, 17 Jun 2020 13:51:02 +0200 Subject: [PATCH 2/4] MSVC cannot omit operand in conditional --- frontends/verilog/verilog_parser.y | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index b34a62248..15c231f3b 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -1481,7 +1481,7 @@ enum_name_decl: delete $1; SET_AST_NODE_LOC(node, @1, @1); delete node->children[0]; - node->children[0] = $2 ?: new AstNode(AST_NONE); + node->children[0] = $2 ? $2 : new AstNode(AST_NONE); astbuf2->children.push_back(node); } ; From 504f22061995d5b0ad6549e360ee1dded0e86116 Mon Sep 17 00:00:00 2001 From: Anonymous Maarten Date: Wed, 17 Jun 2020 13:52:45 +0200 Subject: [PATCH 3/4] MSVC does not understand __builtin_unreachable --- frontends/verilog/preproc.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc index 7905ea598..ea23139e2 100644 --- a/frontends/verilog/preproc.cc +++ b/frontends/verilog/preproc.cc @@ -591,7 +591,7 @@ read_define_args() default: // The only FSM states are 0-2 and we dealt with 2 at the start of the loop. - __builtin_unreachable(); + log_assert(false); } } From 60fb9cabcfad985a4f35acaa74fd6e63b45081bc Mon Sep 17 00:00:00 2001 From: Anonymous Maarten Date: Wed, 17 Jun 2020 13:53:57 +0200 Subject: [PATCH 4/4] msvc does not support designated initializers in structs --- passes/techmap/extract_counter.cc | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/passes/techmap/extract_counter.cc b/passes/techmap/extract_counter.cc index 68b338143..77a4bc0b6 100644 --- a/passes/techmap/extract_counter.cc +++ b/passes/techmap/extract_counter.cc @@ -795,11 +795,11 @@ struct ExtractCounterPass : public Pass { pool _parallel_cells; CounterExtractionSettings settings { - .parallel_cells = _parallel_cells, - .maxwidth = 64, - .minwidth = 2, - .allow_arst = true, - .allowed_dirs = 0, + _parallel_cells, // parallel_cells + 64, // maxwidth + 2, // minwidth + true, // allow_arst + 0, // allowed_dirs }; size_t argidx;