Move presentation intro example

Rework images makefile a bit to get it to import and build from resources folder(s).
Currently requires running twice from a clean build due to the way it finds `.dot` files to convert.

docs/source/yosys_internals/flow/index.rst

@@ -1,6 +1,16 @@
 Internal flow
 =============
 
+
+A (usually short) synthesis script controls Yosys.
+
+This scripts contain three types of commands:
+
+- **Frontends**, that read input files (usually Verilog);
+- **Passes**, that perform transformations on the design in memory;
+- **Backends**, that write the design in memory to a file (various formats are
+  available: Verilog, BLIF, EDIF, SPICE, BTOR, . . .).
+
 .. toctree:: 
 	:maxdepth: 2