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verilog_location: rename location to Location to avoid conflict with Pass::location
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parent
65b53e6473
commit
20b2e47b42
8 changed files with 28 additions and 32 deletions
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@ -164,7 +164,7 @@ namespace AST
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AST_BIND
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AST_BIND
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};
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};
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using AstSrcLocType = location;
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using AstSrcLocType = Location;
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// convert an node type to a string (e.g. for debug output)
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// convert an node type to a string (e.g. for debug output)
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std::string type2str(AstNodeType type);
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std::string type2str(AstNodeType type);
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@ -684,7 +684,7 @@ static bool contains_unbased_unsized(const AstNode *node)
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// adds a wire to the current module with the given name that matches the
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// adds a wire to the current module with the given name that matches the
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// dimensions of the given wire reference
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// dimensions of the given wire reference
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void add_wire_for_ref(location loc, const RTLIL::Wire *ref, const std::string &str)
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void add_wire_for_ref(Location loc, const RTLIL::Wire *ref, const std::string &str)
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{
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{
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auto left = AstNode::mkconst_int(loc, ref->width - 1 + ref->start_offset, true);
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auto left = AstNode::mkconst_int(loc, ref->width - 1 + ref->start_offset, true);
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auto right = AstNode::mkconst_int(loc, ref->start_offset, true);
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auto right = AstNode::mkconst_int(loc, ref->start_offset, true);
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@ -43,7 +43,7 @@ static void verr_at(std::string filename, int begin_line, char const *fmt, va_li
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}
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}
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[[noreturn]]
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[[noreturn]]
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void VERILOG_FRONTEND::err_at_loc(location loc, char const *fmt, ...)
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void VERILOG_FRONTEND::err_at_loc(Location loc, char const *fmt, ...)
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{
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{
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va_list args;
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va_list args;
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va_start(args, fmt);
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va_start(args, fmt);
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@ -10,7 +10,7 @@ YOSYS_NAMESPACE_BEGIN
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namespace VERILOG_FRONTEND
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namespace VERILOG_FRONTEND
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{
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{
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[[noreturn]]
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[[noreturn]]
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void err_at_loc(location loc, char const *fmt, ...);
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void err_at_loc(Location loc, char const *fmt, ...);
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};
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};
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YOSYS_NAMESPACE_END
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YOSYS_NAMESPACE_END
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@ -502,7 +502,7 @@ struct VerilogFrontend : public Frontend {
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}
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}
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auto filename_shared = std::make_shared<std::string>(filename);
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auto filename_shared = std::make_shared<std::string>(filename);
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auto top_loc = location();
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auto top_loc = Location();
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top_loc.begin.filename = filename_shared;
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top_loc.begin.filename = filename_shared;
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parse_state.current_ast = new AST::AstNode(top_loc, AST::AST_DESIGN);
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parse_state.current_ast = new AST::AstNode(top_loc, AST::AST_DESIGN);
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VerilogLexer lexer(&parse_state, &parse_mode, filename_shared);
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VerilogLexer lexer(&parse_state, &parse_mode, filename_shared);
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@ -11,16 +11,16 @@
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* but using shared_ptr for filename
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* but using shared_ptr for filename
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*/
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*/
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struct position {
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struct Position {
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std::shared_ptr<std::string> filename;
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std::shared_ptr<std::string> filename;
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int line;
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int line;
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int column;
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int column;
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position(std::shared_ptr<std::string> filename, int line = 1, int column = 1)
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Position(std::shared_ptr<std::string> filename, int line = 1, int column = 1)
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: filename(filename), line(line), column(column) {}
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: filename(filename), line(line), column(column) {}
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position() = default;
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Position() = default;
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position(const position& other) = default;
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Position(const Position& other) = default;
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position& operator=(const position& other) = default;
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Position& operator=(const Position& other) = default;
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void advance() { ++column; }
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void advance() { ++column; }
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void columns(int count = 1) {
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void columns(int count = 1) {
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@ -41,15 +41,15 @@ struct position {
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}
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}
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};
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};
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struct location {
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struct Location {
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position begin;
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Position begin;
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position end;
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Position end;
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location() = default;
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Location() = default;
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location(const position& b, const position& e)
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Location(const Position& b, const Position& e)
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: begin(b), end(e) {}
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: begin(b), end(e) {}
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location(const location& other) = default;
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Location(const Location& other) = default;
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location& operator=(const location& other) = default;
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Location& operator=(const Location& other) = default;
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void step() { begin = end; }
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void step() { begin = end; }
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@ -89,7 +89,7 @@ struct location {
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}
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}
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};
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};
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static inline std::ostream& operator<<(std::ostream& os, const location& loc) {
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static inline std::ostream& operator<<(std::ostream& os, const Location& loc) {
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return os << loc.to_string();
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return os << loc.to_string();
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}
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}
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@ -38,7 +38,7 @@
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%define api.value.type variant
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%define api.value.type variant
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%define api.prefix {frontend_verilog_yy}
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%define api.prefix {frontend_verilog_yy}
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%define api.token.constructor
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%define api.token.constructor
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%define api.location.type {location}
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%define api.location.type {Location}
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%param { YOSYS_NAMESPACE_PREFIX VERILOG_FRONTEND::VerilogLexer* lexer }
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%param { YOSYS_NAMESPACE_PREFIX VERILOG_FRONTEND::VerilogLexer* lexer }
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%parse-param { YOSYS_NAMESPACE_PREFIX VERILOG_FRONTEND::ParseState* extra }
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%parse-param { YOSYS_NAMESPACE_PREFIX VERILOG_FRONTEND::ParseState* extra }
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@ -146,14 +146,10 @@
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YOSYS_NAMESPACE_BEGIN
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YOSYS_NAMESPACE_BEGIN
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namespace VERILOG_FRONTEND {
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namespace VERILOG_FRONTEND {
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static location location_range(location begin, location end) {
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static Location location_range(Location begin, Location end) {
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return location(begin.begin, end.end);
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return Location(begin.begin, end.end);
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}
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}
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static ConstParser make_ConstParser_here(parser::location_type flex_loc) {
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ConstParser p{flex_loc};
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return p;
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}
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static void append_attr(AstNode *ast, dict<IdString, std::unique_ptr<AstNode>> *al)
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static void append_attr(AstNode *ast, dict<IdString, std::unique_ptr<AstNode>> *al)
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{
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{
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for (auto &it : *al) {
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for (auto &it : *al) {
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@ -370,7 +366,7 @@
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const AstNode *ParseState::addIncOrDecStmt(dict<IdString, std::unique_ptr<AstNode>> *stmt_attr,
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const AstNode *ParseState::addIncOrDecStmt(dict<IdString, std::unique_ptr<AstNode>> *stmt_attr,
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std::unique_ptr<AstNode> lhs,
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std::unique_ptr<AstNode> lhs,
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dict<IdString, std::unique_ptr<AstNode>> *op_attr, AST::AstNodeType op,
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dict<IdString, std::unique_ptr<AstNode>> *op_attr, AST::AstNodeType op,
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location loc)
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Location loc)
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{
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{
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auto one = AstNode::mkconst_int(loc, 1, true);
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auto one = AstNode::mkconst_int(loc, 1, true);
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auto rhs = std::make_unique<AstNode>(loc, op, lhs->clone(), std::move(one));
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auto rhs = std::make_unique<AstNode>(loc, op, lhs->clone(), std::move(one));
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@ -385,7 +381,7 @@
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}
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}
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// create a pre/post-increment/decrement expression, and add the corresponding statement
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// create a pre/post-increment/decrement expression, and add the corresponding statement
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std::unique_ptr<AstNode> ParseState::addIncOrDecExpr(std::unique_ptr<AstNode> lhs, dict<IdString, std::unique_ptr<AstNode>> *attr, AST::AstNodeType op, location loc, bool undo, bool sv_mode)
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std::unique_ptr<AstNode> ParseState::addIncOrDecExpr(std::unique_ptr<AstNode> lhs, dict<IdString, std::unique_ptr<AstNode>> *attr, AST::AstNodeType op, Location loc, bool undo, bool sv_mode)
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{
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{
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ensureAsgnExprAllowed(loc, sv_mode);
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ensureAsgnExprAllowed(loc, sv_mode);
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const AstNode *stmt = addIncOrDecStmt(nullptr, std::move(lhs), attr, op, loc);
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const AstNode *stmt = addIncOrDecStmt(nullptr, std::move(lhs), attr, op, loc);
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@ -402,7 +398,7 @@
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// add a binary operator assignment statement, e.g., a += b
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// add a binary operator assignment statement, e.g., a += b
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std::unique_ptr<AstNode> ParseState::addAsgnBinopStmt(dict<IdString, std::unique_ptr<AstNode>> *attr, std::unique_ptr<AstNode> eq_lhs, AST::AstNodeType op, std::unique_ptr<AstNode> rhs)
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std::unique_ptr<AstNode> ParseState::addAsgnBinopStmt(dict<IdString, std::unique_ptr<AstNode>> *attr, std::unique_ptr<AstNode> eq_lhs, AST::AstNodeType op, std::unique_ptr<AstNode> rhs)
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{
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{
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location loc = location_range(eq_lhs->location, rhs->location);
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Location loc = location_range(eq_lhs->location, rhs->location);
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if (op == AST_SHIFT_LEFT || op == AST_SHIFT_RIGHT ||
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if (op == AST_SHIFT_LEFT || op == AST_SHIFT_RIGHT ||
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op == AST_SHIFT_SLEFT || op == AST_SHIFT_SRIGHT) {
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op == AST_SHIFT_SLEFT || op == AST_SHIFT_SRIGHT) {
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rhs = std::make_unique<AstNode>(rhs->location, AST_TO_UNSIGNED, std::move(rhs));
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rhs = std::make_unique<AstNode>(rhs->location, AST_TO_UNSIGNED, std::move(rhs));
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@ -3219,7 +3215,7 @@ basic_expr:
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TOK_LPAREN expr TOK_RPAREN integral_number {
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TOK_LPAREN expr TOK_RPAREN integral_number {
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if ($4->compare(0, 1, "'") != 0)
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if ($4->compare(0, 1, "'") != 0)
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err_at_loc(@4, "Cast operation must be applied on sized constants e.g. (<expr>)<constval> , while %s is not a sized constant.", $4->c_str());
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err_at_loc(@4, "Cast operation must be applied on sized constants e.g. (<expr>)<constval> , while %s is not a sized constant.", $4->c_str());
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auto p = make_ConstParser_here(@4);
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ConstParser p{@4};
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auto val = p.const2ast(*$4, extra->case_type_stack.size() == 0 ? 0 : extra->case_type_stack.back(), !mode->lib);
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auto val = p.const2ast(*$4, extra->case_type_stack.size() == 0 ? 0 : extra->case_type_stack.back(), !mode->lib);
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if (val == nullptr)
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if (val == nullptr)
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log_error("Value conversion failed: `%s'\n", $4->c_str());
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log_error("Value conversion failed: `%s'\n", $4->c_str());
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@ -3231,7 +3227,7 @@ basic_expr:
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auto bits = std::make_unique<AstNode>(@$, AST_IDENTIFIER);
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auto bits = std::make_unique<AstNode>(@$, AST_IDENTIFIER);
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bits->str = *$1;
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bits->str = *$1;
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SET_AST_NODE_LOC(bits.get(), @1, @1);
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SET_AST_NODE_LOC(bits.get(), @1, @1);
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auto p = make_ConstParser_here(@2);
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ConstParser p{@2};
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auto val = p.const2ast(*$2, extra->case_type_stack.size() == 0 ? 0 : extra->case_type_stack.back(), !mode->lib);
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auto val = p.const2ast(*$2, extra->case_type_stack.size() == 0 ? 0 : extra->case_type_stack.back(), !mode->lib);
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SET_AST_NODE_LOC(val.get(), @2, @2);
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SET_AST_NODE_LOC(val.get(), @2, @2);
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if (val == nullptr)
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if (val == nullptr)
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@ -3239,7 +3235,7 @@ basic_expr:
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$$ = std::make_unique<AstNode>(@$, AST_TO_BITS, std::move(bits), std::move(val));
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$$ = std::make_unique<AstNode>(@$, AST_TO_BITS, std::move(bits), std::move(val));
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} |
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} |
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integral_number {
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integral_number {
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auto p = make_ConstParser_here(@1);
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ConstParser p{@1};
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$$ = p.const2ast(*$1, extra->case_type_stack.size() == 0 ? 0 : extra->case_type_stack.back(), !mode->lib);
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$$ = p.const2ast(*$1, extra->case_type_stack.size() == 0 ? 0 : extra->case_type_stack.back(), !mode->lib);
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SET_AST_NODE_LOC($$.get(), @1, @1);
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SET_AST_NODE_LOC($$.get(), @1, @1);
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if ($$ == nullptr)
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if ($$ == nullptr)
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@ -5725,7 +5725,7 @@ bool RTLIL::SigSpec::parse(RTLIL::SigSpec &sig, RTLIL::Module *module, std::stri
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if (('0' <= netname[0] && netname[0] <= '9') || netname[0] == '\'') {
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if (('0' <= netname[0] && netname[0] <= '9') || netname[0] == '\'') {
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cover("kernel.rtlil.sigspec.parse.const");
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cover("kernel.rtlil.sigspec.parse.const");
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VERILOG_FRONTEND::ConstParser p{location()};
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VERILOG_FRONTEND::ConstParser p{Location()};
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auto ast = p.const2ast(netname);
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auto ast = p.const2ast(netname);
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if (ast == nullptr)
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if (ast == nullptr)
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return false;
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return false;
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