mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-10 21:20:53 +00:00
Code Activity

verilog_location: rename location to Location to avoid conflict with Pass::location

Browse source
This commit is contained in:
Emil J. Tywoniak 2025-08-08 16:22:54 +02:00
parent 65b53e6473
commit 20b2e47b42
8 changed files with 28 additions and 32 deletions
Download patch file Download diff file Expand all files Collapse all files

2
frontends/ast/ast.h
View file

@ -164,7 +164,7 @@ namespace AST
AST_BIND
};
using AstSrcLocType = location;
using AstSrcLocType = Location;
// convert an node type to a string (e.g. for debug output)
std::string type2str(AstNodeType type);

2
frontends/ast/simplify.cc
View file

@ -684,7 +684,7 @@ static bool contains_unbased_unsized(const AstNode *node)
// adds a wire to the current module with the given name that matches the
// dimensions of the given wire reference
void add_wire_for_ref(location loc, const RTLIL::Wire *ref, const std::string &str)
void add_wire_for_ref(Location loc, const RTLIL::Wire *ref, const std::string &str)
{
auto left = AstNode::mkconst_int(loc, ref->width - 1 + ref->start_offset, true);
auto right = AstNode::mkconst_int(loc, ref->start_offset, true);

2
frontends/verilog/verilog_error.cc
View file

@ -43,7 +43,7 @@ static void verr_at(std::string filename, int begin_line, char const *fmt, va_li
}
[[noreturn]]
void VERILOG_FRONTEND::err_at_loc(location loc, char const *fmt, ...)
void VERILOG_FRONTEND::err_at_loc(Location loc, char const *fmt, ...)
{
va_list args;
va_start(args, fmt);

2
frontends/verilog/verilog_error.h
View file

@ -10,7 +10,7 @@ YOSYS_NAMESPACE_BEGIN
namespace VERILOG_FRONTEND
{
[[noreturn]]
void err_at_loc(location loc, char const *fmt, ...);
void err_at_loc(Location loc, char const *fmt, ...);
};
YOSYS_NAMESPACE_END

2
frontends/verilog/verilog_frontend.cc
View file

@ -502,7 +502,7 @@ struct VerilogFrontend : public Frontend {
}
auto filename_shared = std::make_shared<std::string>(filename);
auto top_loc = location();
auto top_loc = Location();
top_loc.begin.filename = filename_shared;
parse_state.current_ast = new AST::AstNode(top_loc, AST::AST_DESIGN);
VerilogLexer lexer(&parse_state, &parse_mode, filename_shared);

26
frontends/verilog/verilog_location.h
View file

@ -11,16 +11,16 @@
* but using shared_ptr for filename
*/
struct position {
struct Position {
std::shared_ptr<std::string> filename;
int line;
int column;
position(std::shared_ptr<std::string> filename, int line = 1, int column = 1)
Position(std::shared_ptr<std::string> filename, int line = 1, int column = 1)
: filename(filename), line(line), column(column) {}
position() = default;
position(const position& other) = default;
position& operator=(const position& other) = default;
Position() = default;
Position(const Position& other) = default;
Position& operator=(const Position& other) = default;
void advance() { ++column; }
void columns(int count = 1) {
@ -41,15 +41,15 @@ struct position {
}
};
struct location {
position begin;
position end;
struct Location {
Position begin;
Position end;
location() = default;
location(const position& b, const position& e)
Location() = default;
Location(const Position& b, const Position& e)
: begin(b), end(e) {}
location(const location& other) = default;
location& operator=(const location& other) = default;
Location(const Location& other) = default;
Location& operator=(const Location& other) = default;
void step() { begin = end; }
@ -89,7 +89,7 @@ struct location {
}
};
static inline std::ostream& operator<<(std::ostream& os, const location& loc) {
static inline std::ostream& operator<<(std::ostream& os, const Location& loc) {
return os << loc.to_string();
}

22
frontends/verilog/verilog_parser.y
View file

@ -38,7 +38,7 @@
%define api.value.type variant
%define api.prefix {frontend_verilog_yy}
%define api.token.constructor
%define api.location.type {location}
%define api.location.type {Location}
%param { YOSYS_NAMESPACE_PREFIX VERILOG_FRONTEND::VerilogLexer* lexer }
%parse-param { YOSYS_NAMESPACE_PREFIX VERILOG_FRONTEND::ParseState* extra }
@ -146,14 +146,10 @@
YOSYS_NAMESPACE_BEGIN
namespace VERILOG_FRONTEND {
static location location_range(location begin, location end) {
return location(begin.begin, end.end);
static Location location_range(Location begin, Location end) {
return Location(begin.begin, end.end);
}
static ConstParser make_ConstParser_here(parser::location_type flex_loc) {
ConstParser p{flex_loc};
return p;
}
static void append_attr(AstNode *ast, dict<IdString, std::unique_ptr<AstNode>> *al)
{
for (auto &it : *al) {
@ -370,7 +366,7 @@
const AstNode *ParseState::addIncOrDecStmt(dict<IdString, std::unique_ptr<AstNode>> *stmt_attr,
std::unique_ptr<AstNode> lhs,
dict<IdString, std::unique_ptr<AstNode>> *op_attr, AST::AstNodeType op,
location loc)
Location loc)
{
auto one = AstNode::mkconst_int(loc, 1, true);
auto rhs = std::make_unique<AstNode>(loc, op, lhs->clone(), std::move(one));
@ -385,7 +381,7 @@
}
// create a pre/post-increment/decrement expression, and add the corresponding statement
std::unique_ptr<AstNode> ParseState::addIncOrDecExpr(std::unique_ptr<AstNode> lhs, dict<IdString, std::unique_ptr<AstNode>> *attr, AST::AstNodeType op, location loc, bool undo, bool sv_mode)
std::unique_ptr<AstNode> ParseState::addIncOrDecExpr(std::unique_ptr<AstNode> lhs, dict<IdString, std::unique_ptr<AstNode>> *attr, AST::AstNodeType op, Location loc, bool undo, bool sv_mode)
{
ensureAsgnExprAllowed(loc, sv_mode);
const AstNode *stmt = addIncOrDecStmt(nullptr, std::move(lhs), attr, op, loc);
@ -402,7 +398,7 @@
// add a binary operator assignment statement, e.g., a += b
std::unique_ptr<AstNode> ParseState::addAsgnBinopStmt(dict<IdString, std::unique_ptr<AstNode>> *attr, std::unique_ptr<AstNode> eq_lhs, AST::AstNodeType op, std::unique_ptr<AstNode> rhs)
{
location loc = location_range(eq_lhs->location, rhs->location);
Location loc = location_range(eq_lhs->location, rhs->location);
if (op == AST_SHIFT_LEFT || op == AST_SHIFT_RIGHT ||
op == AST_SHIFT_SLEFT || op == AST_SHIFT_SRIGHT) {
rhs = std::make_unique<AstNode>(rhs->location, AST_TO_UNSIGNED, std::move(rhs));
@ -3219,7 +3215,7 @@ basic_expr:
TOK_LPAREN expr TOK_RPAREN integral_number {
if ($4->compare(0, 1, "'") != 0)
err_at_loc(@4, "Cast operation must be applied on sized constants e.g. (<expr>)<constval> , while %s is not a sized constant.", $4->c_str());
auto p = make_ConstParser_here(@4);
ConstParser p{@4};
auto val = p.const2ast(*$4, extra->case_type_stack.size() == 0 ? 0 : extra->case_type_stack.back(), !mode->lib);
if (val == nullptr)
log_error("Value conversion failed: `%s'\n", $4->c_str());
@ -3231,7 +3227,7 @@ basic_expr:
auto bits = std::make_unique<AstNode>(@$, AST_IDENTIFIER);
bits->str = *$1;
SET_AST_NODE_LOC(bits.get(), @1, @1);
auto p = make_ConstParser_here(@2);
ConstParser p{@2};
auto val = p.const2ast(*$2, extra->case_type_stack.size() == 0 ? 0 : extra->case_type_stack.back(), !mode->lib);
SET_AST_NODE_LOC(val.get(), @2, @2);
if (val == nullptr)
@ -3239,7 +3235,7 @@ basic_expr:
$$ = std::make_unique<AstNode>(@$, AST_TO_BITS, std::move(bits), std::move(val));
} |
integral_number {
auto p = make_ConstParser_here(@1);
ConstParser p{@1};
$$ = p.const2ast(*$1, extra->case_type_stack.size() == 0 ? 0 : extra->case_type_stack.back(), !mode->lib);
SET_AST_NODE_LOC($$.get(), @1, @1);
if ($$ == nullptr)

2
kernel/rtlil.cc
View file

@ -5725,7 +5725,7 @@ bool RTLIL::SigSpec::parse(RTLIL::SigSpec &sig, RTLIL::Module *module, std::stri
if (('0' <= netname[0] && netname[0] <= '9') || netname[0] == '\'') {
cover("kernel.rtlil.sigspec.parse.const");
VERILOG_FRONTEND::ConstParser p{location()};
VERILOG_FRONTEND::ConstParser p{Location()};
auto ast = p.const2ast(netname);
if (ast == nullptr)
return false;