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	fixup verilog doubleslash test
- add generated doubleslash.v to .gitignore - ensure backend verilog can be read again
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							|  | @ -3,3 +3,4 @@ | |||
| /run-test.mk | ||||
| /const_arst.v | ||||
| /const_sr.v | ||||
| /doubleslash.v | ||||
|  |  | |||
|  | @ -17,3 +17,5 @@ proc | |||
| opt -full | ||||
| 
 | ||||
| write_verilog doubleslash.v | ||||
| design -reset | ||||
| read_verilog doubleslash.v | ||||
|  |  | |||
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