3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-07-15 11:45:41 +00:00

Merge pull request #147 from Silimate/splitcells

reg_rename bug fix
This commit is contained in:
Akash Levy 2026-04-15 14:19:09 -07:00 committed by GitHub
commit 1fbd92537f
No known key found for this signature in database
GPG key ID: B5690EEEBB952194

View file

@ -81,7 +81,7 @@ struct RegRenameInstance {
searchName.erase(pos);
// If register name with no brackets ends with _reg, we can process it
size_t reg_pos = searchName.find("_reg");
size_t reg_pos = searchName.rfind("_reg");
if (reg_pos != std::string::npos && reg_pos == searchName.size() - 4) {
// Remove "_reg" to get the target wire specification