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verilog: error out when non-ANSI task/func arguments

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This commit is contained in:
Eddie Hung 2020-05-11 13:00:36 -07:00
parent e5ce5a4fd5
commit 1f3003be7d
1 changed files with 5 additions and 1 deletions
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6
frontends/verilog/verilog_parser.y
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@ -853,7 +853,11 @@ task_func_port:
} }
if (astbuf2 && astbuf2->children.size() != 2) if (astbuf2 && astbuf2->children.size() != 2)
frontend_verilog_yyerror("task/function argument range must be of the form: [<expr>:<expr>], [<expr>+:<expr>], or [<expr>-:<expr>]"); frontend_verilog_yyerror("task/function argument range must be of the form: [<expr>:<expr>], [<expr>+:<expr>], or [<expr>-:<expr>]");
} wire_name | wire_name; } wire_name |
{
if (!astbuf1)
frontend_verilog_yyerror("Non-ANSI style task/function arguments not currently supported");
} wire_name;
task_func_body: task_func_body:
task_func_body behavioral_stmt | task_func_body behavioral_stmt |