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Improvements and fixes in autotest.sh script and test_autotb
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@ -73,8 +73,8 @@ static std::string idy(std::string str1, std::string str2 = std::string(), std::
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static void autotest(std::ostream &f, RTLIL::Design *design, int num_iter)
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{
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f << stringf("`ifndef dmp_name\n");
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f << stringf("\t`define dmp_name \"not_defined.dmp\"\n");
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f << stringf("`ifndef outfile\n");
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f << stringf("\t`define outfile \"/dev/stdout\"\n");
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f << stringf("`endif\n");
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f << stringf("module testbench;\n\n");
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@ -301,7 +301,7 @@ static void autotest(std::ostream &f, RTLIL::Design *design, int num_iter)
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f << stringf("initial begin\n");
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f << stringf("\t// $dumpfile(\"testbench.vcd\");\n");
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f << stringf("\t// $dumpvars(0, testbench);\n");
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f << stringf("\tfile = $fopen(`dmp_name);\n");
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f << stringf("\tfile = $fopen(`outfile);\n");
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for (auto it = design->modules_.begin(); it != design->modules_.end(); ++it)
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if (!it->second->get_bool_attribute("\\gentb_skip"))
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f << stringf("\t%s;\n", idy(it->first.str(), "test").c_str());
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@ -65,18 +65,18 @@ compile_and_run() {
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if $use_modelsim; then
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altver=$( ls -v /opt/altera/ | grep '^[0-9]' | tail -n1; )
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/opt/altera/$altver/modelsim_ase/bin/vlib work
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/opt/altera/$altver/modelsim_ase/bin/vlog +define+dmp_name=\"$output\" "$@"
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/opt/altera/$altver/modelsim_ase/bin/vlog +define+outfile=\"$output\" "$@"
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/opt/altera/$altver/modelsim_ase/bin/vsim -c -do 'run -all; exit;' testbench
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elif $use_xsim; then
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(
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set +x
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files=( "$@" )
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xilver=$( ls -v /opt/Xilinx/Vivado/ | grep '^[0-9]' | tail -n1; )
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/opt/Xilinx/Vivado/$xilver/bin/xvlog "${files[@]}"
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/opt/Xilinx/Vivado/$xilver/bin/xelab -R work.testbench | grep '#OUT#' > "$output"
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/opt/Xilinx/Vivado/$xilver/bin/xvlog -d outfile=\"$output\" "${files[@]}"
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/opt/Xilinx/Vivado/$xilver/bin/xelab -R work.testbench
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)
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else
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iverilog -Ddmp_name=\"$output\" -s testbench -o "$exe" "$@"
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iverilog -Doutfile=\"$output\" -s testbench -o "$exe" "$@"
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vvp -n "$exe"
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fi
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}
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