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	Fixed equiv_make for partially undriven nets (e.g. after "clean -purge")
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					 1 changed files with 31 additions and 12 deletions
				
			
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					@ -37,6 +37,9 @@ struct EquivMakeWorker
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	pool<IdString> blacklist_names;
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						pool<IdString> blacklist_names;
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	dict<IdString, dict<Const, Const>> encdata;
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						dict<IdString, dict<Const, Const>> encdata;
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						pool<SigBit> undriven_bits;
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						SigMap assign_map;
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	void read_blacklists()
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						void read_blacklists()
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	{
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						{
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		for (auto fn : blacklists)
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							for (auto fn : blacklists)
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					@ -253,12 +256,25 @@ struct EquivMakeWorker
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			else
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								else
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			{
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								{
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				Wire *wire = equiv_mod->addWire(id, gold_wire->width);
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									Wire *wire = equiv_mod->addWire(id, gold_wire->width);
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									SigSpec rdmap_gold, rdmap_gate, rdmap_equiv;
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				for (int i = 0; i < wire->width; i++)
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									for (int i = 0; i < wire->width; i++) {
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										if (undriven_bits.count(assign_map(SigBit(gold_wire, i)))) {
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											log("  Skipping signal bit %d: undriven on gold side.\n", i);
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											continue;
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										}
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										if (undriven_bits.count(assign_map(SigBit(gate_wire, i)))) {
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											log("  Skipping signal bit %d: undriven on gate side.\n", i);
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											continue;
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										}
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					equiv_mod->addEquiv(NEW_ID, SigSpec(gold_wire, i), SigSpec(gate_wire, i), SigSpec(wire, i));
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										equiv_mod->addEquiv(NEW_ID, SigSpec(gold_wire, i), SigSpec(gate_wire, i), SigSpec(wire, i));
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										rdmap_gold.append(SigBit(gold_wire, i));
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										rdmap_gate.append(SigBit(gate_wire, i));
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										rdmap_equiv.append(SigBit(wire, i));
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									}
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				rd_signal_map.add(assign_map(gold_wire), wire);
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									rd_signal_map.add(rdmap_gold, rdmap_equiv);
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				rd_signal_map.add(assign_map(gate_wire), wire);
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									rd_signal_map.add(rdmap_gate, rdmap_equiv);
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			}
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								}
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		}
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							}
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					@ -327,10 +343,10 @@ struct EquivMakeWorker
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		}
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							}
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	}
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						}
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	void find_undriven_nets()
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						void find_undriven_nets(bool mark)
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	{
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						{
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		pool<SigBit> undriven_bits;
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							undriven_bits.clear();
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		SigMap assign_map(equiv_mod);
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							assign_map.set(equiv_mod);
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		for (auto wire : equiv_mod->wires()) {
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							for (auto wire : equiv_mod->wires()) {
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			for (auto bit : assign_map(wire))
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								for (auto bit : assign_map(wire))
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					@ -351,21 +367,24 @@ struct EquivMakeWorker
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						undriven_bits.erase(bit);
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											undriven_bits.erase(bit);
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		}
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							}
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		SigSpec undriven_sig(undriven_bits);
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							if (mark) {
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		undriven_sig.sort_and_unify();
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								SigSpec undriven_sig(undriven_bits);
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								undriven_sig.sort_and_unify();
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		for (auto chunk : undriven_sig.chunks()) {
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								for (auto chunk : undriven_sig.chunks()) {
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			log("Setting undriven nets to undef: %s\n", log_signal(chunk));
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									log("Setting undriven nets to undef: %s\n", log_signal(chunk));
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			equiv_mod->connect(chunk, SigSpec(State::Sx, chunk.width));
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									equiv_mod->connect(chunk, SigSpec(State::Sx, chunk.width));
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								}
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		}
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							}
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	}
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						}
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	void run()
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						void run()
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	{
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						{
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		copy_to_equiv();
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							copy_to_equiv();
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							find_undriven_nets(false);
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		find_same_wires();
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							find_same_wires();
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		find_same_cells();
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							find_same_cells();
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		find_undriven_nets();
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							find_undriven_nets(true);
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	}
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						}
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};
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					};
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