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Merge pull request #5687 from YosysHQ/nella/pdr-doc
Update help text for rename -witness and write_aiger -ywmap
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3 changed files with 42 additions and 12 deletions
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@ -3,9 +3,9 @@ Symbolic model checking
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.. todo:: check text context
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.. note::
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While it is possible to perform model checking directly in Yosys, it
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.. note::
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While it is possible to perform model checking directly in Yosys, it
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is highly recommended to use SBY or EQY for formal hardware verification.
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Symbolic Model Checking (SMC) is used to formally prove that a circuit has (or
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@ -117,3 +117,32 @@ Result with fixed :file:`axis_master.v`:
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Solving problem with 159144 variables and 441626 clauses..
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SAT proof finished - no model found: SUCCESS!
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Witness framework and per-property tracking
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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When using AIGER-based formal verification flows (such as the ``abc`` engine in
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SBY), Yosys provides infrastructure for tracking individual formal
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properties through the verification pipeline.
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The `rename -witness` pass assigns public names to all cells that participate in
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the witness framework:
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- Witness signal cells: `$anyconst`, `$anyseq`, `$anyinit`,
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`$allconst`, `$allseq`
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- Formal property cells: `$assert`, `$assume`, `$cover`, `$live`,
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`$fair`, `$check`
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These public names allow downstream tools to refer to individual properties by
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their hierarchical path rather than by anonymous internal identifiers.
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The `write_aiger -ywmap` option generates a map file for conversion to and from
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Yosys witness traces, and also allows for mapping AIGER bad-state properties and
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invariant constraints back to individual formal properties by name. This enables
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features like per-property pass/fail reporting (e.g. ``abc pdr`` with
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``--keep-going`` mode).
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The `write_smt2` backend similarly uses the public witness names when emitting
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SMT2 comments. Cells whose ``hdlname`` attribute contains the ``_witness_``
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marker are treated as having private names for comment purposes, keeping solver
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output clean.
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