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Renamed opt_const to opt_expr

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This commit is contained in:
Clifford Wolf 2016-03-31 08:43:28 +02:00
parent d31c968d76
commit 1d0f0d668a
14 changed files with 84 additions and 83 deletions
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4
techlibs/common/prep.cc
View file

@ -69,7 +69,7 @@ struct PrepPass : public Pass {
log("\n");
log(" prep:\n");
log(" proc\n");
log(" opt_const\n");
log(" opt_expr -keepdc\n");
log(" opt_clean\n");
log(" check\n");
log(" opt -keepdc\n");
@ -134,7 +134,7 @@ struct PrepPass : public Pass {
if (check_label(active, run_from, run_to, "coarse"))
{
Pass::call(design, "proc");
Pass::call(design, "opt_const");
Pass::call(design, "opt_expr -keepdc");
Pass::call(design, "opt_clean");
Pass::call(design, "check");
Pass::call(design, "opt -keepdc");

4
techlibs/common/synth.cc
View file

@ -81,7 +81,7 @@ struct SynthPass : public Pass {
log("\n");
log(" coarse:\n");
log(" proc\n");
log(" opt_const\n");
log(" opt_expr\n");
log(" opt_clean\n");
log(" check\n");
log(" opt\n");
@ -180,7 +180,7 @@ struct SynthPass : public Pass {
if (check_label(active, run_from, run_to, "coarse"))
{
Pass::call(design, "proc");
Pass::call(design, "opt_const");
Pass::call(design, "opt_expr");
Pass::call(design, "opt_clean");
Pass::call(design, "check");
Pass::call(design, "opt");

4
techlibs/common/techmap.v
View file

@ -93,7 +93,7 @@ module _90_shift_ops_shr_shl_sshl_sshr (A, B, Y);
localparam BB_WIDTH = `MIN($clog2(shift_left ? Y_WIDTH : A_SIGNED ? WIDTH : A_WIDTH) + 1, B_WIDTH);
wire [1023:0] _TECHMAP_DO_00_ = "proc;;";
wire [1023:0] _TECHMAP_DO_01_ = "RECURSION; CONSTMAP; opt_muxtree; opt_const -mux_undef -mux_bool -fine;;;";
wire [1023:0] _TECHMAP_DO_01_ = "RECURSION; CONSTMAP; opt_muxtree; opt_expr -mux_undef -mux_bool -fine;;;";
integer i;
reg [WIDTH-1:0] buffer;
@ -136,7 +136,7 @@ module _90_shift_shiftx (A, B, Y);
localparam extbit = _TECHMAP_CELLTYPE_ == "$shift" ? 1'b0 : 1'bx;
wire [1023:0] _TECHMAP_DO_00_ = "proc;;";
wire [1023:0] _TECHMAP_DO_01_ = "CONSTMAP; opt_muxtree; opt_const -mux_undef -mux_bool -fine;;;";
wire [1023:0] _TECHMAP_DO_01_ = "CONSTMAP; opt_muxtree; opt_expr -mux_undef -mux_bool -fine;;;";
integer i;
reg [WIDTH-1:0] buffer;

8
techlibs/ice40/ice40_opt.cc
View file

@ -127,7 +127,7 @@ struct Ice40OptPass : public Pass {
log("\n");
log(" do\n");
log(" <ice40 specific optimizations>\n");
log(" opt_const -mux_undef -undriven [-full]\n");
log(" opt_expr -mux_undef -undriven [-full]\n");
log(" opt_share\n");
log(" opt_rmdff\n");
log(" opt_clean\n");
@ -136,14 +136,14 @@ struct Ice40OptPass : public Pass {
}
virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
{
string opt_const_args = "-mux_undef -undriven";
string opt_expr_args = "-mux_undef -undriven";
log_header("Executing ICE40_OPT pass (performing simple optimizations).\n");
log_push();
size_t argidx;
for (argidx = 1; argidx < args.size(); argidx++) {
if (args[argidx] == "-full") {
opt_const_args += " -full";
opt_expr_args += " -full";
continue;
}
break;
@ -158,7 +158,7 @@ struct Ice40OptPass : public Pass {
for (auto module : design->selected_modules())
run_ice40_opts(module);
Pass::call(design, "opt_const " + opt_const_args);
Pass::call(design, "opt_expr " + opt_expr_args);
Pass::call(design, "opt_share");
Pass::call(design, "opt_rmdff");
Pass::call(design, "opt_clean");

4
techlibs/ice40/synth_ice40.cc
View file

@ -106,7 +106,7 @@ struct SynthIce40Pass : public Pass {
log(" dffsr2dff\n");
log(" dff2dffe -direct-match $_DFF_*\n");
log(" techmap -map +/ice40/cells_map.v\n");
log(" opt_const -mux_undef\n");
log(" opt_expr -mux_undef\n");
log(" simplemap\n");
log(" ice40_ffinit\n");
log(" ice40_ffssr\n");
@ -247,7 +247,7 @@ struct SynthIce40Pass : public Pass {
Pass::call(design, "dffsr2dff");
Pass::call(design, "dff2dffe -direct-match $_DFF_*");
Pass::call(design, "techmap -map +/ice40/cells_map.v");
Pass::call(design, "opt_const -mux_undef");
Pass::call(design, "opt_expr -mux_undef");
Pass::call(design, "simplemap");
Pass::call(design, "ice40_ffinit");
Pass::call(design, "ice40_ffssr");