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https://github.com/YosysHQ/yosys
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Repack SigSpecs when possible
This commit is contained in:
Robert O'Callahan
parent
38d1d071a5
commit
1cf3497d15
2 changed files with 122 additions and 18 deletions
139
kernel/rtlil.cc
139
kernel/rtlil.cc
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@ -4692,6 +4692,39 @@ void RTLIL::SigSpec::unpack()
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new (&bits_) std::vector<RTLIL::SigBit>(std::move(bits));
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}
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void RTLIL::SigSpec::try_repack()
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{
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if (rep_ != BITS)
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return;
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cover("kernel.rtlil.sigspec.convert.try_repack");
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int bits_size = GetSize(bits_);
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if (bits_size == 0)
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return;
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if (bits_[0].is_wire()) {
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for (int i = 1; i < bits_size; i++)
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if (bits_[0].wire != bits_[i].wire || bits_[0].offset + i != bits_[i].offset)
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return;
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SigChunk chunk(bits_[0].wire, bits_[0].offset, bits_size);
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bits_.~vector();
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rep_ = CHUNK;
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new (&chunk_) SigChunk(std::move(chunk));
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return;
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}
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std::vector<RTLIL::State> bits;
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bits.reserve(bits_size);
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bits.push_back(bits_[0].data);
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for (int i = 1; i < bits_size; i++) {
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if (bits_[i].is_wire())
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return;
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bits.push_back(bits_[i].data);
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}
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bits_.~vector();
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rep_ = CHUNK;
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new (&chunk_) SigChunk(std::move(bits));
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}
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Hasher::hash_t RTLIL::SigSpec::updhash() const
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{
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cover("kernel.rtlil.sigspec.hash");
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@ -4719,6 +4752,7 @@ void RTLIL::SigSpec::sort()
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cover("kernel.rtlil.sigspec.sort");
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std::sort(bits_.begin(), bits_.end());
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hash_.clear();
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try_repack();
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}
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void RTLIL::SigSpec::sort_and_unify()
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@ -4736,6 +4770,7 @@ void RTLIL::SigSpec::sort_and_unify()
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*this = unique_bits;
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hash_.clear();
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try_repack();
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}
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void RTLIL::SigSpec::replace(const RTLIL::SigSpec &pattern, const RTLIL::SigSpec &with)
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@ -4759,13 +4794,17 @@ void RTLIL::SigSpec::replace(const RTLIL::SigSpec &pattern, const RTLIL::SigSpec
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}
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int this_size = size();
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bool other_modified = false;
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for (int j = 0; j < this_size; j++) {
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auto it = pattern_to_with.find((*this)[j]);
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if (it != pattern_to_with.end()) {
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other_modified = true;
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(*other)[j] = with[it->second];
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}
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}
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if (other_modified)
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other->try_repack();
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other->check();
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}
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@ -4784,12 +4823,17 @@ void RTLIL::SigSpec::replace(const dict<RTLIL::SigBit, RTLIL::SigBit> &rules, RT
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if (rules.empty()) return;
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int this_size = size();
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bool other_modified = false;
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for (int i = 0; i < this_size; i++) {
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auto it = rules.find((*this)[i]);
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if (it != rules.end())
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if (it != rules.end()) {
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other_modified = true;
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(*other)[i] = it->second;
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}
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}
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if (other_modified)
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other->try_repack();
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other->check();
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}
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@ -4808,12 +4852,17 @@ void RTLIL::SigSpec::replace(const std::map<RTLIL::SigBit, RTLIL::SigBit> &rules
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if (rules.empty()) return;
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int this_size = size();
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bool other_modified = false;
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for (int i = 0; i < this_size; i++) {
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auto it = rules.find((*this)[i]);
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if (it != rules.end())
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if (it != rules.end()) {
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other_modified = true;
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(*other)[i] = it->second;
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}
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}
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if (other_modified)
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other->try_repack();
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other->check();
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}
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@ -4839,9 +4888,10 @@ void RTLIL::SigSpec::remove2(const RTLIL::SigSpec &pattern, RTLIL::SigSpec *othe
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if (other != NULL) {
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log_assert(size() == other->size());
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other->unpack();
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other->hash_.clear();
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}
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bool modified = false;
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bool other_modified = false;
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for (int i = GetSize(bits_) - 1; i >= 0; i--)
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{
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if (bits_[i].wire == NULL) continue;
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@ -4850,14 +4900,24 @@ void RTLIL::SigSpec::remove2(const RTLIL::SigSpec &pattern, RTLIL::SigSpec *othe
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if (bits_[i].wire == pattern_chunk.wire &&
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bits_[i].offset >= pattern_chunk.offset &&
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bits_[i].offset < pattern_chunk.offset + pattern_chunk.width) {
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modified = true;
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bits_.erase(bits_.begin() + i);
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if (other != NULL)
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if (other != NULL) {
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other_modified = true;
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other->bits_.erase(other->bits_.begin() + i);
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}
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break;
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}
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}
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hash_.clear();
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if (modified) {
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hash_.clear();
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try_repack();
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}
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if (other_modified) {
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other->hash_.clear();
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other->try_repack();
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}
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check();
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}
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@ -4884,18 +4944,29 @@ void RTLIL::SigSpec::remove2(const pool<RTLIL::SigBit> &pattern, RTLIL::SigSpec
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if (other != NULL) {
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log_assert(size() == other->size());
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other->unpack();
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other->hash_.clear();
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}
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bool modified = false;
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bool other_modified = false;
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for (int i = GetSize(bits_) - 1; i >= 0; i--) {
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if (bits_[i].wire != NULL && pattern.count(bits_[i])) {
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modified = true;
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bits_.erase(bits_.begin() + i);
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if (other != NULL)
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if (other != NULL) {
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other_modified = true;
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other->bits_.erase(other->bits_.begin() + i);
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}
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}
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}
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hash_.clear();
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if (modified) {
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hash_.clear();
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try_repack();
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}
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if (other_modified) {
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other->hash_.clear();
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other->try_repack();
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}
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check();
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}
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@ -4911,18 +4982,29 @@ void RTLIL::SigSpec::remove2(const std::set<RTLIL::SigBit> &pattern, RTLIL::SigS
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if (other != NULL) {
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log_assert(size() == other->size());
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other->unpack();
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other->hash_.clear();
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}
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bool modified = false;
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bool other_modified = false;
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for (int i = GetSize(bits_) - 1; i >= 0; i--) {
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if (bits_[i].wire != NULL && pattern.count(bits_[i])) {
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modified = true;
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bits_.erase(bits_.begin() + i);
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if (other != NULL)
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if (other != NULL) {
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other_modified = true;
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other->bits_.erase(other->bits_.begin() + i);
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}
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}
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}
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hash_.clear();
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if (modified) {
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hash_.clear();
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try_repack();
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}
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if (other_modified) {
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other->hash_.clear();
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other->try_repack();
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}
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check();
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}
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@ -4938,18 +5020,29 @@ void RTLIL::SigSpec::remove2(const pool<RTLIL::Wire*> &pattern, RTLIL::SigSpec *
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if (other != NULL) {
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log_assert(size() == other->size());
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other->unpack();
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other->hash_.clear();
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}
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bool modified = false;
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bool other_modified = false;
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for (int i = GetSize(bits_) - 1; i >= 0; i--) {
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if (bits_[i].wire != NULL && pattern.count(bits_[i].wire)) {
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modified = true;
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bits_.erase(bits_.begin() + i);
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if (other != NULL)
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if (other != NULL) {
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other_modified = true;
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other->bits_.erase(other->bits_.begin() + i);
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}
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}
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}
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hash_.clear();
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if (modified) {
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hash_.clear();
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try_repack();
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}
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if (other_modified) {
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other->hash_.clear();
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other->try_repack();
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}
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check();
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}
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@ -5025,6 +5118,9 @@ void RTLIL::SigSpec::replace(int offset, const RTLIL::SigSpec &with)
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{
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cover("kernel.rtlil.sigspec.replace_pos");
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if (with.size() == 0)
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return;
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unpack();
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log_assert(offset >= 0);
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@ -5037,6 +5133,7 @@ void RTLIL::SigSpec::replace(int offset, const RTLIL::SigSpec &with)
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++i;
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}
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hash_.clear();
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try_repack();
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check();
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}
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@ -5050,6 +5147,7 @@ void RTLIL::SigSpec::remove_const()
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if (chunk_.wire == NULL) {
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chunk_.~SigChunk();
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init_empty_bits();
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hash_.clear();
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}
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}
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else
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@ -5058,15 +5156,16 @@ void RTLIL::SigSpec::remove_const()
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std::vector<RTLIL::SigBit> new_bits;
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new_bits.reserve(bits_.size());
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for (auto &bit : bits_)
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if (bit.wire != NULL)
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new_bits.push_back(bit);
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bits_.swap(new_bits);
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if (GetSize(new_bits) != GetSize(bits_)) {
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bits_.swap(new_bits);
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hash_.clear();
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try_repack();
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}
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}
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hash_.clear();
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check();
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}
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@ -5074,6 +5173,9 @@ void RTLIL::SigSpec::remove(int offset, int length)
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{
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cover("kernel.rtlil.sigspec.remove_pos");
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if (length == 0)
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return;
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unpack();
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log_assert(offset >= 0);
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@ -5083,6 +5185,7 @@ void RTLIL::SigSpec::remove(int offset, int length)
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bits_.erase(bits_.begin() + offset, bits_.begin() + offset + length);
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hash_.clear();
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try_repack();
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check();
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}
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@ -1287,6 +1287,7 @@ private:
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if (rep_ == CHUNK)
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unpack();
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}
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void try_repack();
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Hasher::hash_t updhash() const;
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void destroy() {
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