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Fixed typo in last commit

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This commit is contained in:
Andrew Zonenberg 2016-10-18 20:46:49 -07:00
parent e78fa157a3
commit 1cca1563c6
1 changed files with 1 additions and 1 deletions
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techlibs/greenpak4/cells_sim.v
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@ -308,7 +308,7 @@ endmodule
module GP_PGEN(input wire nRST, input wire CLK, output reg OUT); module GP_PGEN(input wire nRST, input wire CLK, output reg OUT);
initial OUT = 0; initial OUT = 0;
parameter PATTERN_DATA = 16'h0; parameter PATTERN_DATA = 16'h0;
parameter PATTERN_LEN = 4'd16; parameter PATTERN_LEN = 5'd16;
reg[3:0] count = 0; reg[3:0] count = 0;
always @(posedge CLK) begin always @(posedge CLK) begin