3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-24 01:25:33 +00:00

If fully constant don't count as user

This commit is contained in:
Akash Levy 2024-08-21 22:30:16 -07:00
parent 8989f2f98c
commit 1cc7e5536b

View file

@ -152,7 +152,7 @@ struct MuxpackWorker
b_sig = sigmap(cell->getPort(ID::B));
SigSpec y_sig = sigmap(cell->getPort(ID::Y));
if (sig_chain_next.count(a_sig))
if (sig_chain_next.count(a_sig) && !a_sig.is_fully_const())
for (auto a_bit : a_sig.bits())
sigbit_with_non_chain_users.insert(a_bit);
else {
@ -161,7 +161,7 @@ struct MuxpackWorker
}
if (!b_sig.empty()) {
if (sig_chain_next.count(b_sig))
if (sig_chain_next.count(b_sig) && !b_sig.is_fully_const())
for (auto b_bit : b_sig.bits())
sigbit_with_non_chain_users.insert(b_bit);
else {
@ -207,7 +207,6 @@ struct MuxpackWorker
goto start_cell;
{
log_assert(sig_chain_prev.count(a_sig) != 0);
Cell *prev_cell = sig_chain_prev.at(a_sig);
log_assert(prev_cell);
SigSpec s_sig = sigmap(cell->getPort(ID::S));