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equiv_opt with -assert
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1 changed files with 1 additions and 3 deletions
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@ -2,9 +2,7 @@ read_verilog fsm.v
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hierarchy -top top
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hierarchy -top top
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proc
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proc
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flatten
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flatten
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#ERROR: Found 4 unproven $equiv cells in 'equiv_status -assert'.
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equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check
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#equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check
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equiv_opt -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd top # Constrain all select calls below inside the top module
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cd top # Constrain all select calls below inside the top module
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select -assert-count 1 t:L6MUX21
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select -assert-count 1 t:L6MUX21
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