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This commit is contained in:
Akash Levy 2025-09-09 05:50:48 -07:00
parent 36b753285c
commit 1b3375d8df
117 changed files with 1890 additions and 984 deletions
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2
tests/svtypes/typedef_initial_and_assign.ys
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@ -11,4 +11,4 @@ logger -expect warning "reg '\\var_19' is assigned in a continuous assignment" 1
read_verilog -sv typedef_initial_and_assign.sv
hierarchy; proc; opt; async2sync
select -module top
sat -verify -seq 1 -tempinduct -prove-asserts -show-all
sat -verify -tempinduct -prove-asserts -show-all

4
tests/svtypes/typedef_struct_port.ys
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@ -1,6 +1,6 @@
read_verilog -sv typedef_struct_port.sv
hierarchy; proc; opt; async2sync
select -module top
sat -verify -seq 1 -tempinduct -prove-asserts -show-all
sat -verify -tempinduct -prove-asserts -show-all
select -module test_parser
sat -verify -seq 1 -tempinduct -prove-asserts -show-all
sat -verify -tempinduct -prove-asserts -show-all