mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-10 21:20:53 +00:00
Code Activity

Revert changes to RTLIL::SigSpec methods

Browse source
This commit is contained in:
Eddie Hung 2019-08-13 17:09:28 -07:00
parent e35dfc5ab5
commit 1b0e68db94
4 changed files with 36 additions and 15 deletions
Download patch file Download diff file Expand all files Collapse all files

3
passes/pmgen/ice40_dsp.cc
View file

@ -23,9 +23,10 @@
USING_YOSYS_NAMESPACE
PRIVATE_NAMESPACE_BEGIN
template<class T> bool includes(const T &lhs, const T &rhs) {
template<class T> inline bool includes(const T &lhs, const T &rhs) {
return std::includes(lhs.begin(), lhs.end(), rhs.begin(), rhs.end());
}
#include <set>
#include "passes/pmgen/ice40_dsp_pm.h"
void create_ice40_dsp(ice40_dsp_pm &pm)