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techmap: add TCL test for Han-Carlson adder

This commit is contained in:
Emil J. Tywoniak 2024-11-28 15:16:48 +01:00
parent 289673a807
commit 1a562f9605
4 changed files with 37 additions and 1 deletions

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yosys -import
read_verilog +/choices/han-carlson.v
read_verilog lcu_refined.v
design -save init
for {set i 1} {$i <= 16} {incr i} {
design -load init
chparam -set WIDTH $i
yosys proc
equiv_make -blacklist han-carlson.nomatch lcu _85_lcu_han_carlson equiv
equiv_simple equiv
equiv_status -assert equiv
}