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Progress in presentation

This commit is contained in:
Clifford Wolf 2014-06-14 16:42:30 +02:00
parent 22a998903b
commit 1a487303a0
5 changed files with 109 additions and 3 deletions

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module scrambler(
input clk, rst, in_bit,
output reg out_bit
);
reg [31:0] xs;
always @(posedge clk) begin
if (rst)
xs = 1;
xs = xs ^ (xs << 13);
xs = xs ^ (xs >> 17);
xs = xs ^ (xs << 5);
out_bit <= in_bit ^ xs[0];
end
endmodule